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Vineet Dujari Phones & Addresses

  • 46680 Windmill Dr, Fremont, CA 94539 (510) 651-7119
  • Sunnyvale, CA
  • Milpitas, CA
  • Santa Clara, CA
  • 14969 Jerries Dr, Saratoga, CA 95070 (408) 482-9829
  • 14969 Jerries Dr, Saratoga, CA 95070

Work

Company: Sandisk Apr 2012 Position: Application engineering and technical marketing

Education

Degree: Master of Science, Masters School / High School: The University of Texas at Austin Sep 1981 to Dec 1982

Skills

Systems Engineering • Product Development • Asic • Soc • Sales Engineering

Industries

Semiconductors

Resumes

Resumes

Vineet Dujari Photo 1

Application Engineering And Technical Marketing

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Location:
San Francisco, CA
Industry:
Semiconductors
Work:
Sandisk
Application Engineering and Technical Marketing

Marvell Semiconductor 2008 - Apr 2012
Field Application Engineering

Nemerix May 2007 - 2008
Field Application Engineering

Pmc-Sierra Sep 1999 - Apr 2007
Systems Engineering

Cirrus Logic Sep 1990 - Sep 1999
Systems, Application and Firmware Engineering
Education:
The University of Texas at Austin Sep 1981 - Dec 1982
Master of Science, Masters
Northern Arizona University 1980 - 1981
Master of Business Administration, Masters, Business
Indian Institute of Technology, Delhi Jul 1974 - Jun 1979
Bachelors, Bachelor of Technology
Mother's International School
Skills:
Systems Engineering
Product Development
Asic
Soc
Sales Engineering

Business Records

Name / Title
Company / Classification
Phones & Addresses
Vineet Dujari
Engineering Executive
PMC-Sierra
Semiconductors · Mfg of Semiconductors and Related Devices · Mfg Semiconductors and Related Devices · Electrician · Semiconductor and Related Device Manufacturing
1380 Bordeaux Drive, Sunnyvale, Ca, Sunnyvale, CA 94089
1380 Bordeaux Dr, Sunnyvale, CA 94089
3975 Freedom Cir, Santa Clara, CA 95054
(408) 239-8000, (408) 492-9192, (408) 492-1157, (604) 415-6000

Publications

Us Patents

Mixed-Signal Single-Chip Integrated System Electronics For Data Storage Devices

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US Patent:
6594716, Jul 15, 2003
Filed:
Jun 28, 2001
Appl. No.:
09/892489
Inventors:
Siamack Nemazie - San Jose CA
Kaushik Popat - Pleasanton CA
Balaji Virajpet - San Jose CA
Roger McPherson - Westminster CO
Maoxin Wei - Louisville CO
Vineet Dujari - Fremont CA
Shiang-Jyh Chang - San Jose CA
Assignee:
Cirrus Logic, Inc. - Austin TX
International Classification:
G06F 1312
US Classification:
710 74, 714 27, 360 55
Abstract:
An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e. g. , digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e. g. , CD-ROMs and the like), tape drives, and other data storage devices.

Integrated Disc Drive Controller

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US Patent:
7475173, Jan 6, 2009
Filed:
Mar 17, 2006
Appl. No.:
11/378456
Inventors:
Siamack Nemazie - San Jose CA, US
Kaushik Popat - Pleasanton CA, US
Balaji Virajpet - San Jose CA, US
Roger McPherson - Westminster CO, US
Maoxin Wei - Lousville CO, US
Vineet Dujari - Fremont CA, US
Shiang-Jyh Chang - San Jose CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F 13/00
US Classification:
710 74, 710112, 326 38, 326 39
Abstract:
An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e. g. , digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e. g. , CD-ROMs and the like), tape drives, and other data storage devices.

Mixed-Signal Single-Chip Integrated System Electronics For Data Storage Devices

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US Patent:
7529869, May 5, 2009
Filed:
Aug 18, 2005
Appl. No.:
11/208348
Inventors:
Siamack Nemazie - San Jose CA, US
Kaushik Popat - Pleasanton CA, US
Balaji Virajpet - San Jose CA, US
William Foland, Jr. - Littleton CO, US
Roger McPherson - Westminster CO, US
Maoxin Wei - Louisville CO, US
Vineet Dujari - Fremont CA, US
Shiang-Jyh Chang - San Jose CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F 13/00
US Classification:
710 74, 710112, 710110
Abstract:
An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e. g. , digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e. g. , CD-ROMs and the like), tape drives, and other data storage devices.

Systems And Methods For Data Storage Devices And Controllers

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US Patent:
8060674, Nov 15, 2011
Filed:
May 5, 2009
Appl. No.:
12/435945
Inventors:
Siamack Nemazie - San Jose CA, US
Kaushik Popat - Pleasanton CA, US
Balaji Virajpet - San Jose CA, US
Roger McPherson - Westminster CO, US
Maoxin Wei - Louisville CO, US
Vineet Dujari - Fremont CA, US
Shiang-Jyh Chang - San Jose CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F 13/00
US Classification:
710 74, 710110, 710112, 326 38, 326 39
Abstract:
An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e. g. , digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e. g. , CD-ROMs and the like), tape drives, and other data storage devices.

Method And Apparatus For Overwriting An Encryption Key Of A Media Drive

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US Patent:
8645716, Feb 4, 2014
Filed:
Oct 4, 2011
Appl. No.:
13/252416
Inventors:
Vineet Dujari - Fremont CA, US
Tze Lei Poo - Sunnyvale CA, US
Assignee:
Marvell International Ltd. - Hamilton
International Classification:
G06F 12/14
H04L 29/06
G08B 29/00
H04L 9/00
G06F 12/00
US Classification:
713193, 713165, 713194, 726 34, 711100, 711164, 711167, 380277
Abstract:
The present disclosure describes apparatuses and techniques for fail-safe key zeroization. In some aspects a periodic counter is activated that is configured to indicate an amount of time that content of a one-time-programmable (OTP) memory is accessible and overwriting of the content of the OTP is caused when the periodic counter reaches a predetermined value effective to zeroize the content. In other aspects a periodic counter is started in response to a power event and one or more encryption keys stored in OTP memory are zeroized if an indication of media drive security is not received within a predetermined amount of time.

Mixed-Signal Single-Chip Integrated System Electronics For Data Storage Devices

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US Patent:
20010056511, Dec 27, 2001
Filed:
Jun 28, 2001
Appl. No.:
09/892649
Inventors:
Siamack Nemazie - San Jose CA, US
Kaushik Popat - Pleasanton CA, US
Balaji Virajpet - San Jose CA, US
William Foland - Littleton CO, US
Roger McPherson - Westminster CO, US
Maoxin Wei - Louisville CO, US
Vineet Dujari - Fremont CA, US
Shiang-Jyh Chang - San Jose CA, US
International Classification:
G06F013/12
US Classification:
710/074000
Abstract:
An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.

Status Transfer Structure Within A Data Processing System With Status Read Indication

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US Patent:
50382756, Aug 6, 1991
Filed:
Mar 2, 1990
Appl. No.:
7/475514
Inventors:
Vineet Dujari - Santa Clara CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G06F 1338
US Classification:
364200
Abstract:
A system for transferring the status information between a peripheral controller and central processing unit (CPU) is disclosed. The system utilizes three registers and an interrupt pin for determination of the presence of a STATUS VALID bit. If the STATUS VALID bit is set, then a STATUS OVERFLOW bit is set by the peripheral controller. If the STATUS VALID bit is not set, the peripheral controller updates the status information and sets the STATUS VALID bit. Through the use of this transfer system much of the complexity associated with known systems is eliminated without the concomitant loss in processing speed.

Method And Apparatus For Reading A Disk

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US Patent:
46188983, Oct 21, 1986
Filed:
Dec 20, 1984
Appl. No.:
6/684423
Inventors:
Mark S. Young - Mountain View CA
John Drew - Los Gatos CA
Michael C. Shebanow - Berkeley CA
Vineet Dujari - San Jose CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G11B 509
US Classification:
360 51
Abstract:
A method and apparatus for reading data from a disk having missing or unreadable field address marks. Expected address marks are searched for within a time window which is generated using a counter. When an expected address mark is generated at any time within the time window, the counter is set or reset to generate another time window within which the next address mark is expected to occur. By starting or restarting the counter each time an expected address mark is detected the effects of variations in spindle speed which occur prior to the detection of the address mark are eliminated, thus increasing the probability that readable address marks will be detected within a time window.
Vineet Shailja Dujari from Fremont, CA, age ~66 Get Report