US Patent:
20090303819, Dec 10, 2009
Inventors:
Heechoul Park - San Jose CA, US
Song Kim - San Jose CA, US
Lancelot Kwong - Fremont CA, US
Assignee:
SUN MICROSYSTEMS, INC. - SANTA CLARA CA
International Classification:
G11C 7/00
G11C 5/14
G11C 8/00
Abstract:
A memory circuit for reading and writing data into a SRAM memory array using charge recycling is presented. The write and read circuit includes a cell voltage level switch, a recycle charge storage, a precharge switch, a write enable switch, and column decoder. The cell voltage level switch is connected to a low power supply and a high power supply and has two states of operation: a write operation state and a read operation state. For each state of operation, the voltage level switch selectively provides a power supply if a column has been selected or if the operation is a read or write. The recycle charge storage stores excess charge from SRAM cells after a read operation or after a write operation in unselected columns. After the read or write operation, the recycle charge storage discharges excess charge to the bitlines during bitline precharging.