Search

Jim Z He

from San Jose, CA
Age ~60

Jim He Phones & Addresses

  • 1277 Holly Hill Dr, San Jose, CA 95122 (408) 298-6238
  • 2851 Homestead Rd, Santa Clara, CA 95051 (408) 246-2151
  • 743 San Jule Ct, Sunnyvale, CA 94085 (408) 736-5414
  • Santa Rosa, CA
  • 1012 King Ct, El Cerrito, CA 94530 (510) 526-8074
  • Calistoga, CA

Resumes

Resumes

Jim He Photo 1

Senior Software Engineer

View page
Location:
1727 Cherryhills Ln, San Jose, CA 95125
Industry:
Computer Software
Work:
Linkedin
Senior Software Engineer

Brigade Oct 2014 - Feb 2017
Software Engineer

Comprehend Systems Jul 2013 - Oct 2014
Software Engineer

Voxle Nov 2012 - Jul 2013
Co-Founder

Funzio Jul 2011 - Oct 2012
Software Engineer
Education:
Cornell University 2008 - 2009
Masters, Master of Engineering, Computer Engineering, Engineering
Carnegie Mellon University 2004 - 2008
Bachelors, Bachelor of Science, Computer Engineering
Skills:
Distributed Systems
Git
Software Design
Data Warehousing
Facebook Graph Api
Cassandra
Data Analytics
Scala
Apache Kafka
Agile Methodologies
Hadoop
Facebook
Programming
Java
Docker
Php
Redis
Ruby on Rails
Sql
Python
Software Development
Elasticsearch
Spark
Mysql
Languages:
English
Jim He Photo 2

Jim He

View page
Location:
United States
Jim He Photo 3

Jim He

View page
Location:
United States
Jim He Photo 4

Jim He

View page
Location:
United States

Publications

Us Patents

Techniques For The Use Of Amorphous Carbon (Apf) For Various Etch And Litho Integration Schemes

View page
US Patent:
7718081, May 18, 2010
Filed:
Jun 2, 2006
Appl. No.:
11/422031
Inventors:
Wei Liu - San Jose CA, US
Jim Zhongyi He - Sunnyvale CA, US
Sang H. Ahn - Foster Cuty CA, US
Meihua Shen - Fremont CA, US
Hichem M'Saad - Santa Clara CA, US
Wendy H. Yeh - Mountain View CA, US
Christopher D. Bencher - San Jose CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
C23F 1/00
B44C 1/22
G03C 5/00
H01L 21/302
C03C 25/68
US Classification:
216 41, 216 58, 216 79, 257E21029, 257E21035, 257E21038, 257E21039, 257E21232, 257E21235, 257E21236, 257E2127, 430313, 438689
Abstract:
A method of etching a substrate is provided. The method of etching a substrate includes transferring a pattern into the substrate using a double patterned amorphous carbon layer on the substrate as a hardmask. Optionally, a non-carbon based layer is deposited on the amorphous carbon layer as a capping layer before the pattern is transferred into the substrate.

Apparatus For Etching High Aspect Ratio Features

View page
US Patent:
8475625, Jul 2, 2013
Filed:
May 3, 2006
Appl. No.:
11/381523
Inventors:
Sharma Pamarthy - Hayward CA, US
Huutri Dao - San Jose CA, US
Xiaoping Zhou - San Jose CA, US
Kelly A. McDonough - San Jose CA, US
Jivko Dinev - Cupertino CA, US
Farid Abooameri - San Ramon CA, US
David E. Gutierrez - San Jose CA, US
Jim Zhongyi He - Sunnyvale CA, US
Robert S. Clark - San Jose CA, US
Dennis M. Koosau - Hayward CA, US
Jeffrey William Dietz - San Jose CA, US
Declan Scanlan - Sunnyvale CA, US
Subhash Deshmukh - San Jose CA, US
John P. Holland - San Jose CA, US
Alexander Paterson - San Jose CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 21/3065
US Classification:
15634533, 15634524, 438689, 118715
Abstract:
Embodiments of the invention provide a method and apparatus, such as a processing chamber, suitable for etching high aspect ratio features. Other embodiments include a showerhead assembly for use in the processing chamber. In one embodiment, a processing chamber includes a chamber body having a showerhead assembly and substrate support disposed therein. The showerhead assembly includes at least two fluidly isolated plenums, a region transmissive to an optical metrology signal, and a plurality of gas passages formed through the showerhead assembly fluidly coupling the plenums to the interior volume of the chamber body.

Forming Bilayer Resist Patterns

View page
US Patent:
20040018742, Jan 29, 2004
Filed:
Mar 4, 2003
Appl. No.:
10/379980
Inventors:
Jim He - Sunnyvale CA, US
Meihua Shen - Fremont CA, US
Hong Du - Cupertino CA, US
Scott Williams - Sunnyvale CA, US
Assignee:
Applied Materials, Inc.
International Classification:
H01L021/302
H01L021/461
US Classification:
438/710000
Abstract:
The present invention includes a method for patterning a bilayer resist having a patterned upper resist layer over a lower resist layer formed on a substrate. In one embodiment of the present invention, the method includes an optional upper resist layer trimming step, an upper resist layer treatment step, and a lower resist layer etching step. In the upper resist layer trimming step, the upper resist layer is trimmed in a plasma of a first process gas. In the upper resist layer treatment step, the upper resist layer is treated in a plasma of a second process gas to increase its etch resistance during the subsequent lower resist layer etching step. In the lower resist etching step, the lower resist layer is etched in a plasma of a third process gas, using the upper resist layer as a mask.

Techniques For The Use Of Amorphous Carbon (Apf) For Various Etch And Litho Integration Scheme

View page
US Patent:
20050167394, Aug 4, 2005
Filed:
Jan 30, 2004
Appl. No.:
10/768724
Inventors:
Wei liu - San Jose CA, US
Jim He - Sunnyvale CA, US
Sang Ahn - Foster City CA, US
Meihua Shen - Fremont CA, US
Hichem M'Saad - Santa Clara CA, US
Wendy Yeh - Mountain View CA, US
Chistopher Bencher - San Jose CA, US
International Classification:
C23F001/00
B44C001/22
C03C015/00
C03C025/68
US Classification:
216041000
Abstract:
A method of etching a substrate is provided. The method of etching a substrate includes transferring a pattern into the substrate using a double patterned amorphous carbon layer on the substrate as a hardmask. Optionally, a non-carbon based layer is deposited on the amorphous carbon layer as a capping layer before the pattern is transferred into the substrate.

Substrate Chucking And Dechucking Methods

View page
US Patent:
20190206712, Jul 4, 2019
Filed:
Mar 5, 2019
Appl. No.:
16/293437
Inventors:
- Santa Clara CA, US
Jim Zhongyi HE - San Jose CA, US
Ramesh GOPALAN - Fremont CA, US
Robert T. HIRAHARA - San Jose CA, US
Govinda RAJ - Santa Clara CA, US
International Classification:
H01L 21/683
H01J 37/32
Abstract:
Methods for chucking and de-chucking a substrate from an electrostatic chucking (ESC) substrate support to reduce scratches of the non-active surface of a substrate include simultaneously increasing a voltage applied to a chucking electrode embedded in the ESC substrate support and a backside gas pressure in a backside volume disposed between the substrate and the substrate support to chuck the substrate and reversing the process to de-chuck the substrate.

Cmp Soft Polishing Of Electrostatic Substrate Support Geometries

View page
US Patent:
20190111541, Apr 18, 2019
Filed:
Feb 1, 2018
Appl. No.:
15/886574
Inventors:
- Santa Clara CA, US
Jim Zhongyi HE - San Jose CA, US
International Classification:
B24B 37/14
B24B 37/04
B24B 37/10
H01L 21/683
Abstract:
Methods of polishing a patterned surface of an electrostatic chucking (ESC) substrate support to be used in plasma assisted or plasma enhanced semiconductor manufacturing chambers are provided herein. In particular, embodiments described herein, provide polishing methods that round and debur the edges of elevated features and remove dielectric material from the non-substrate contacting surfaces of a patterned substrate support to reduce defectivity associated therewith.

Soft Chucking And Dechucking For Electrostatic Chucking Substrate Supports

View page
US Patent:
20190080949, Mar 14, 2019
Filed:
Nov 13, 2017
Appl. No.:
15/811352
Inventors:
- Santa Clara CA, US
Jim Zhongyi HE - San Jose CA, US
International Classification:
H01L 21/683
H01J 37/32
C23C 16/458
Abstract:
Methods for chucking and de-chucking a substrate from an electrostatic chucking (ESC) substrate support to reduce scratches of the non-active surface of a substrate include simultaneously increasing a voltage applied to a chucking electrode embedded in the ESC substrate support and a backside gas pressure in a backside volume disposed between the substrate and the substrate support to chuck the substrate and reversing the process to de-chuck the substrate.

Esc Substrate Support With Chucking Force Control

View page
US Patent:
20190067070, Feb 28, 2019
Filed:
Aug 20, 2018
Appl. No.:
16/105731
Inventors:
- Santa Clara CA, US
Jim Zhongyi HE - San Jose CA, US
Zhenwen DING - Santa Clara CA, US
International Classification:
H01L 21/683
H01L 21/67
H01J 37/32
H01L 21/66
Abstract:
Embodiments described herein provide methods and apparatus used to reduce or substantially eliminate undesirable scratches to the non-active surface of a substrate by monitoring and controlling the deflection of a substrate, and thus the contact force between the substrate and a substrate support, during substrate processing. In one embodiment a method for processing a substrate includes positioning the substrate on a patterned surface of a substrate support, where the substrate support is disposed in a processing volume of a processing chamber, applying a chucking voltage to a chucking electrode disposed in the substrate support; flowing a gas into a backside volume disposed between the substrate and the substrate support, monitoring a deflection of the substrate, and changing a chucking parameter based on the deflection of the substrate.
Jim Z He from San Jose, CA, age ~60 Get Report