Inventors:
- Dublin, IE
Jason Zhang - Monterey Park CA, US
Hongwei Jia - Aliso Viejo CA, US
Daniel M. Kinzer - El Segundo CA, US
Assignee:
Navitas Semiconductor Limited - Dublin
International Classification:
H03K 3/012
H02M 3/155
Abstract:
A circuit is disclosed. The circuit includes a first transistor including a first drain terminal, a first gate terminal and a first source terminal, a depletion-mode transistor including a second drain terminal, a second gate terminal and a second source terminal, the second drain terminal connected to the first drain terminal, the depletion-mode transistor arranged to sense a first voltage at the first drain terminal and generate a second voltage at the second source terminal, and a comparator arranged to receive the second voltage, and transition the first transistor from an on state to an off state in response to the first transistor entering its saturation region of operation. In one aspect, the first transistor includes gallium nitride (GaN). In another aspect, the circuit further includes a logic circuit arranged to receive an output voltage generated by the comparator and to drive the first gate terminal.
