Work:
NJIT and Brookhaven National Lab
Jan 2009 to 2000
Research Assistant
Education:
New Jersey Institute of Technology
Newark, NJ
2009 to 2013
Ph.D in Electrical Engineering, VLSI and Solid State Device
New Jersey Institute of Technology
Newark, NJ
2007 to 2008
M. S. in Electrical & Computer Engineering
Beijing Institute of Technology
1984 to 1988
BSc in Electrical Engineering
Skills:
4 Years of X-ray semiconductor detector ASIC and board level design&test experience in Dr. Siddons Detector development group, Brookhaven National Lab. Specialized in the area of VLSI design, skilled at both analog and digital circuit ASIC design with Cadence virtuoso schematic, layout and simulation, Mentor Graphic schematic capture, IC station and HSPICE simulation; and VHDL/Verilog programming, Modsim simulation and Xilinx/Altera FPGA development. Specialized in the board level circuit design&test by using the Mentor Graphic board station and PADS for circuit and layout, PSPICE for simulation, various test instruments for design verification test and debug. Many years of circuit board level design in Lucent Technologies.
