Jing Qi from Lake Zurich, IL, age 59

Resumes

Senior Human Resources Officer

View page

Work:

Steelcase Shanghai 2010 - 2012
Senior Human Resources Officer

Jing Qi

View page

Jing Qi

View page

Jing Qi Lake Zurich, IL

View page

Work:

Zimmer
Warsaw, IN
Nov 2014 to Jan 2015
Consultant - CAPA /Sr. Quality Engineer
POLYSCIENCE
Niles, IL
Jan 2013 to Aug 2014
Certified Quality engineer
PRINTOVATE TECHNOLOGIES
Palatine, IL
Jul 2010 to Dec 2012
Consultant
MOTOROLA, INC.
Schaumburg, IL
1999 to Mar 2009
Senior Engineer/Project Manager, Product Manager
New Product Introduction, MOTOROLA, INC.
Libertyville, IL
2007 to 2009
Senior Manufacturing Engineer/Project Manager
Physical Realization Research Center, MOTOROLA, INC.
Schaumburg, IL
2004 to 2007
Senior Research Engineer
Advanced Technology Center, MOTOROLA, INC.
Schaumburg, IL
1999 to 2004
Senior Process Engineer
Advanced Technology Center, MOTOROLA INC.
Schaumburg, IL
Jun 1999 to Aug 1999
Engineering Intern

Education:

Auburn University
Auburn, AL
1997 to 1999
MSEE in Microelectronics Science and Technology
Auburn University
Auburn, AL
1996 to 1998
MSTE in Polymer, Fiber, and Textile Engineering
Nanjing University of Science and Technology
BSME

Skills:

Continuous Improvements, Process Improvements, Cost Reductions, New Product Development, New Product Introduction, Six Sigma, Lean Manufacturing, Design for Six Sigma (DFSS), Design for Manufacturability (DFM), Define-Measure-Analyze-Improve... (DMAIC) , Failure Modes and Effects Analysis (FMEA), Supplier-Input-Process-Output-... (SIPOC), Product Quality and Reliability, Corrective and Preventive Actions (CAPA), Root Cause Analysis, Project Management, Supplier Development.

Publications

Us Patents

Wafer Coating And Singulation Method

View page

US Patent:

6649445, Nov 18, 2003

Filed:

Sep 11, 2002

Appl. No.:

10/241265

Inventors:

Jing Qi - Schaumburg IL
Janice Danvir - Arlington Heights IL
Tomasz Klosowiak - Glenview IL

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H01L 2144

US Classification:

438108, 438114, 438462, 438465

Abstract:

A method for providing an underfill material on an integrated circuit chip at the wafer level. The wafer ( ) typically contains one or more integrated circuit chips ( ), and each integrated circuit chip typically has a plurality of solder bumps ( ) on its active surface. The wafer is first diced ( ) on the active surface side to form channels ( ) that will ultimately define the edges ( ) of each individual integrated circuit chip, the dicing being of such a depth that it only cuts part-way through the wafer. The front side ( ) of the wafer is then coated ( ) with an underfill material ( ). Generally, a portion ( ) of each solder bump remains uncoated, but in certain cases the bumps can be completely covered. The back side of the wafer is then lapped, ground, polished or otherwise treated ( ) so as to remove material down to the level of the previously diced channels. This reduction in the thickness of the wafer causes the original diced channels to now extend completely from the front side to the back side of the wafer.

Semiconductor Device Exhibiting Enhanced Pattern Recognition When Illuminated In A Machine Vision System

View page

US Patent:

6650022, Nov 18, 2003

Filed:

Sep 11, 2002

Appl. No.:

10/241017

Inventors:

Jing Qi - Lake Zurich IL
Janice Danvir - Arlington Heights IL
Zhaojin Han - Lake Zurich IL
Prasanna Kulkarni - Schaumburg IL
Nadia Yala - Schaumburg IL
Robert Doot - Seattle WA

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H01L 3300

US Classification:

257797, 257782, 257786

Abstract:

A bumped semiconductor device ( ) exhibiting enhanced pattern recognition when illuminated in a machine vision system. The semiconductor device has a substantially coplanar array of solder bumps ( ) and a coating of underfill material ( ) on one face. A fluxing composition ( ) containing an image enhancing agent is selectively deposited over at least two of the solder bumps in the array to modify the optical characteristics of the solder bumps to cause the solder bumps to appear bright against the background of the underfill material when the semiconductor device is illuminated ( ) by selected wavelengths of light.

Flip-Chip Assembly With Thin Underfill And Thick Solder Mask

View page

US Patent:

6774497, Aug 10, 2004

Filed:

Mar 28, 2003

Appl. No.:

10/402631

Inventors:

Jing Qi - Lake Zurich IL
Janice M. Danvir - Arlington Heights IL
Tomasz L. Klosowiak - Glenview IL
Prasanna Kulkarni - Schaumburg IL
Nadia Yala - Schaumburg IL

Assignee:

Freescale Semiconductor, Inc. - Austin TX

International Classification:

H01L 2348

US Classification:

257783, 257778, 438118

Abstract:

The invention provides a method for attaching a flip chip to an electrical substrate such as a printed wiring board. A bumped flip chip is provided, the flip chip including an active surface and a plurality of connective bumps extending from the active surface, each connective bump including a side region. A thin layer of an underfill material is applied to the active surface of the flip chip and to a portion of the side regions of the connective bumps. The flip chip is positioned on the electrical substrate, the electrical substrate including a thick layer of a solder mask disposed on the electrical substrate. The flip chip is heated to electrically connect the flip chip to the electrical substrate, wherein the underfill material and the solder mask combine to form a stress-relief layer when the flip chip is electrically connected to the electrical substrate.

Area-Array Device Assembly With Pre-Applied Underfill Layers On Printed Wiring Board

View page

US Patent:

6821878, Nov 23, 2004

Filed:

Feb 27, 2003

Appl. No.:

10/376405

Inventors:

Janice Danvir - Arlington Heights IL
Jing Qi - Lake Zurich IL

Assignee:

Freescale Semiconductor, Inc. - Austin TX

International Classification:

H01L 2144

US Classification:

438613, 438108, 438106, 438121, 438128

Abstract:

The invention provides a method of attaching an area-array device such as a bumped flip chip to an electrical substrate. An underfill material is applied to a portion of the electrical substrate, and the underfill material is heated to an underfill-material staging temperature. A bumped area-array device is provided, the bumped area-array device including an interconnection surface and a plurality of connective bumps extending from the interconnection surface. The interconnection surface of the bumped area-array device is positioned adjacent the applied underfill material. The bumped area-array device is heated to electrically connect the connective bumps to the electrical substrate. The invention also provides a flip-chip assembly and a printed wiring board panel with pre-applied underfill material.

Semiconductor Package Device And Method

View page

US Patent:

20030132513, Jul 17, 2003

Filed:

Jan 11, 2002

Appl. No.:

10/044777

Inventors:

Marc Chason - Schaumburg IL, US
Janice Danvir - Arlington Heights IL, US
Jing Qi - Schaumburg IL, US
Nadia Yala - Schaumburg IL, US

Assignee:

Motorola, Inc.

International Classification:

H01L023/02
H01L023/22
H01L023/24

US Classification:

257/678000, 257/687000

Abstract:

An interposer-based semiconductor package () having at least one semiconductor die () attached to one side thereof also has, prior to placement on a printed wiring board (), an underfill material () disposed at least partially thereon. Depending upon the embodiment, the underfill material () may initially cover interface electrodes () on the interposer (). Such material () can be selectively removed to partially expose the interface electrodes (). In other embodiments, apertures () can be left in the underfill material () during deposition, or formed after the underfill material () has been deposited, and the interface electrodes () subsequently formed in the apertures (). Deposition of the underfill material () can be done with a single interposer-based package () or simultaneously with a plurality of such packages. Once deposited, the underfill material can be processed to render it relatively stable an substantially non-tacky. So processed, the package can be easily handled.

Communicating Information Using An Existing Light Source Of An Electronic Device

View page

US Patent:

20080253202, Oct 16, 2008

Filed:

Apr 13, 2007

Appl. No.:

11/735217

Inventors:

Huinan Yu - Kildeer IL, US
Aroon V. Tungare - Winfield IL, US
John R. St. Peter - Elburn IL, US
Jing Qi - Lake Zurich IL, US

Assignee:

MOTOROLA, INC. - Schaumburg IL

International Classification:

G11C 5/14

US Classification:

36518909

Abstract:

An electronic device includes a data processor for generating a data stream for communication with an external device. The electronic device also includes an illumination light source () for illuminating components () within the electronic device and which provides modulated optical signals indicative of the data stream generated from the data processor . A power management circuit is operatively connected to the data processor and to the illumination light source (). The power management circuit selectively drives the illumination light source () with power levels optimized for illuminating the components () or with power level modulation indicative of the data stream generated from the data processor . The electronic device also includes an optical receiver by which the electronic device receives modulated optical signals containing a data stream generated from another device.

Videos & Images