Jia Liu

6628000, Sep 30, 2003

Nov 19, 2001

10/006443

Ken Pham - San Jose CA
Jia Liu - San Jose CA
Luu Thanh Nguyen - Sunnyvale CA
William Paul Mazotti - San Martin CA
Bruce Carlton Roberts - San Jose CA

National Semiconductor Corporation - Santa Clara CA

H01L 23544

257797, 257666, 257432, 438 65, 438111

Techniques for maintaining the optical coupling efficiency between photonic devices of an optoelectronic module and its interconnecting optical fibers are described. The techniques ensure that the mating surfaces of an optical sub-assembly and a chip sub-assembly remain planar to each other throughout and after the soldering process of the optoelectronic manufacturing process. These techniques include the use of a ceramic fixture made of a stack of plates having openings that secure the orientation of the optical and chip sub-assemblies. The fixture can have one or more openings to secure a respective one or more combination of optical and chip sub-assemblies. A high temperature tape can also be used to maintain the parallelism between the optical and chip sub-assemblies. An optical sub-assembly having pedestals on its bottom surface can also be use to maintain parallelism of the optical and chip sub-assemblies. Methods of using each technique is also described.

6642613, Nov 4, 2003

Sep 4, 2001

09/947210

Luu Thanh Nguyen - Sunnyvale CA
Ken Pham - San Jose CA
Peter Deane - Los Altos CA
William Paul Mazotti - San Martin CA
Bruce Carlton Roberts - San Jose CA
Jia Liu - San Jose CA

National Semiconductor Corporation - Santa Clara CA

H01L 2302

257686, 257777

The present invention provides a technique for manufacturing a low cost device that provides a true die to external fiber optic connection. Specifically, the present invention relates to several techniques for joining an optical device package to a semiconductor device package. The first technique involves using wirebond studs and an adhesive material, the second technique involves the use of an anisotropic conductive film, and the third technique involves the use of solder material. Each of these techniques provides high levels of thermal, electrical and optical performance. The methods apply to optical sub-assembly and chip sub-assembly interfaces in transceivers, transmitters, as well as receivers for opto-electronic packages.

6749345, Jun 15, 2004

May 24, 2002

10/155743

Stephen Andrew Gee - Danville CA
Luu Thanh Nguyen - Sunnyvale CA
Ken Pham - San Jose CA
Jia Liu - San Jose CA
William Paul Mazotti - San Martin CA
Bruce Carlton Roberts - San Jose CA
Peter Deane - Los Altos CA

National Semiconductor Corporation - Santa Clara CA

G02B 638

385 75

Electro-optical packages that embed the electronics of the packages directly to the optical cabling, provide short electrical connection paths for high performance, and that provide a robust interconnects. A first electro-optical package includes an integrated circuit and a connector sleeve configured to receive a plug-in optical assembly from the underside of the PC board. The plug-in optical assembly includes a backing piece and an opto-electric device mounted onto the backing piece. An electrical connection is provided between the opto-electric device and a contact location on the backing piece and a contact is provided between the contact location on the backing piece and the integrated circuit. With a second electro-optical package, an integrated circuit having an active surface facing in a first direction and an opto-electric device having contact points facing a second direction are provided. The integrated circuit and the opto-electric are positioned with respect to one another such that a direct electrical connection can be formed between the active surface of the integrated circuit and the contact points of the opto-electrical device.

6765275, Jul 20, 2004

Nov 6, 2002

10/290481

Neeraj Anil Pendse - Mountain View CA
Jia Liu - San Jose CA
Jitendra Mohan - Santa Clara CA
Bruce Carlton Roberts - San Jose CA
Luu Thanh Nguyen - Sunnyvale CA
William Paul Mazotti - San Martin CA

National Semiconductor Corporation - Santa Clara CA

H01L 310203

257433, 257 81, 257 98, 257 99, 257691, 385 89, 385 14, 385131

A high performance and small-scale circuitry substrate is described. The circuitry substrate includes a dielectric layer, a return plane attached to a bottom surface of the dielectric layer, and a plurality of return paths (ground) and signal lines that are attached to a top surface of the dielectric layer. The return paths on the top surface are connected to the return plane on the bottom surface by wrapping around at least one edge of the dielectric material. Return paths on the top layer can also separate each pair or adjacent signal lines. The circuitry substrate can be advantageously used to form an optoelectronic module.

6767140, Jul 27, 2004

Mar 3, 2003

10/379474

Neeraj Anil Pendse - Mountain View CA
Bruce Carlton Roberts - San Jose CA
Jia Liu - San Jose CA
Lionel Auzereau - Le Cannet, FR
Christopher Barratt - Villeneuve-Loubet, FR

National Semiconductor Corporation - Santa Clara CA

G02B 636

385 89, 385 88

A high performance ceramic block for use with small-scale circuitry is described. The block can be used in an optical sub-assembly (OSA) suitable for optical interconnection with optical fibers and electrical interconnection with a chip sub-assembly (CSA) is formed. The block includes a first surface and a second surface and is formed using one of low temperature co-fired ceramic (LTCC) and high temperature co-fired ceramic (HTCC) techniques. Photonic devices are formed on the first surface of the ceramic block and electrical contacts are formed on a second surface of the block. The electrical contacts being suitable for electrical communication with a chip sub-assembly. Electrical connections are formed so that they pass internally through the ceramic block to electrically interconnect the photonic devices on the first face of the block with the electrical contacts on the second face of the block. Such a block can be advantageously used to form an optoelectronic module.

6802654, Oct 12, 2004

Apr 9, 2002

10/119619

Bruce C. Roberts - San Jose CA
Stephen A. Gee - Danville CA
William P. Mazotti - San Martin CA
Luu T. Nguyen - Sunnyvale CA
Jia Liu - San Jose CA
Peter Deane - Los Altos CA
Ken Pham - San Jose CA

National Semiconductor Corporation - Santa Clara CA

G02B 636

385 88, 385 92

The invention comprises a connector apparatus for electrically interconnecting a chip sub-assembly to an optical sub-assembly. The apparatus includes a connector sleeve with a chip sub-assembly having at least one electrical connection arranged thereon. The connector sleeve is suitable for receiving a connector plug that includes an optical fiber optically coupled to the photonic devices of an optical sub-assembly that includes electrical connectors. The connector plug is engaged with the connector sleeve, thereby electrically interconnecting the electrical connections of the chip sub-assembly to the electrical connectors of the optical sub-assembly such that electrical signals can pass between the chip sub-assembly and a photonic device of the optical sub-assembly.

6838317, Jan 4, 2005

Aug 29, 2003

10/652805

Luu Thanh Nguyen - Sunnyvale CA, US
Ken Pham - San Jose CA, US
Peter Deane - Los Altos CA, US
William Paul Mazotti - San Martin CA, US
Bruce Carlton Roberts - San Jose CA, US
Jia Liu - San Jose CA, US

National Semiconductor Corporation - Santa Clara CA

H01L 2144
H01L 2100
H01L 2302

438108, 438 25, 438 26, 438107, 257686, 257777, 257778

The present invention provides a technique for manufacturing a low cost device that provides a true die to external fiber optic connection. Specifically, the present invention relates to several techniques for joining an optical device package to a semiconductor device package. The first technique involves using wirebond studs and an adhesive material, the second technique involves the use of an anisotropic conductive film, and the third technique involves the use of solder material. Each of these techniques provides high levels of thermal, electrical and optical performance. The methods apply to optical sub-assembly and chip sub-assembly interfaces in transceivers, transmitters, as well as receivers for opto-electronic packages.

6858468, Feb 22, 2005

Apr 11, 2003

10/412564

Luu Thanh Nguyen - Sunnyvale CA, US
Ken Pham - San Jose CA, US
Peter Deane - Los Altos CA, US
William Paul Mazotti - San Martin CA, US
Bruce Carlton Roberts - San Jose CA, US
Jia Liu - San Jose CA, US

National Semiconductor Corporation - Santa Clara CA

H01L023/495
H01L023/02
H01L021/44
H01L021/30

438108, 257666, 257777, 257778, 438107, 438110, 438455

The present invention provides a technique for manufacturing a low cost device that provides a true die to external fiber optic connection. Specifically, the present invention relates to several techniques for joining an optical device package to a semiconductor device package. The first technique involves using wirebond studs and an adhesive material, the second technique involves the use of an anisotropic conductive film, and the third technique involves the use of solder material. Each of these techniques provides high levels of thermal, electrical and optical performance. The methods apply to optical sub-assembly and chip sub-assembly interfaces in transceivers, transmitters, as well as receivers for opto-electronic packages.