Inventors:
Steven Jacobson - Dublin CA, US
Duc Huu Nguyen - San Jose CA, US
William Ng - San Jose CA, US
Zachary Joshua Gemmill - Mountain View CA, US
Usharani Bhimavarapu - San Jose CA, US
Kevin Weaver - San Jose CA, US
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
G06K 9/00
Abstract:
The time required to perform a passive voltage contrast test of an area of interest of a layer of interest is substantially reduced by digitizing a passive voltage contrast image to form contrast data that represents the image, and comparing the contrast data to computer aided design (CAD) data that defines the semiconductor device.