Yong Wu Phones & Addresses
-
San Bruno, CA
-
Fremont, CA
-
Daly City, CA
-
South San Francisco, CA
-
Redmond, WA
-
Mercer Island, WA
-
San Francisco, CA
Business Records
Name / Title
Company / Classification
Phones & Addresses
WOO CONSTRUCTION, INC
HONG KONG BUFFET & GRILL LLC
UNITED CABINETRY INC
LE GRAND ORCHID NAIL AND SPA INC
President
IT-EUREKA
Nonclassifiable Establishments
Nonclassifiable Establishments
41051 Rosewalk Ct, Fremont, CA 94539
Publications
Isbn (Books And Publications)
Xing Zheng an Jian Su Song Ce Lue Yu Shi Li Dian Ping: Xingzhenganjian Susongcelueyu Shilidianping
View page
Author
Yong Wu
ISBN #
7543836467
Us Patents
Systems And Methods Of Motion And Edge Adaptive Processing Including Motion Compensation Features
View pageUS Patent:
8189105, May 29, 2012
Filed:
Oct 17, 2007
Appl. No.:
11/874096
Inventors:
Jiande Jiang - San Jose CA, US
Jun Zhang - San Jose CA, US
Yong Wu - Santa Clara CA, US
Dong Wang - Shanghai, CN
Chun Wang - Shanhai, CN
Jun Zhang - San Jose CA, US
Yong Wu - Santa Clara CA, US
Dong Wang - Shanghai, CN
Chun Wang - Shanhai, CN
Assignee:
Entropic Communications, Inc. - San Diego CA
International Classification:
H04N 7/01
US Classification:
348452, 345448
Abstract:
Systems and methods of processing pixel information associated with video image deinterlacing are disclosed. In one exemplary implementation, the method may include performing an edge adaptive interpolation process on a present field so as to determine whether an edge passes through a pixel, wherein the edge adaptive interpolation process provides edge data including a first intensity estimate for the pixel, receiving motion data associated with motion compensation processing, including an estimated motion vector for at least one pixel proximate to the pixel in at least one reference field, determining a second intensity estimate for the pixel as a function of the edge data and the motion data, and performing an intensity-calculation procedure, wherein an interpolated intensity of the pixel is calculated as a function of the first intensity estimate and the second intensity estimate.
Liner For V-Nand Word Line Stack
View pageUS Patent:
20230005945, Jan 5, 2023
Filed:
Sep 9, 2022
Appl. No.:
17/941421
Inventors:
- Santa Clara CA, US
Yixiong Yang - Fremont CA, US
Yong Wu - Sunnyvale CA, US
Wei V. Tang - Santa Clara CA, US
Srinivas Gandikota - Santa Clara CA, US
Yongjing Lin - San Jose CA, US
Karla M Bernal Ramos - San Jose CA, US
Shih Chung Chen - Cupertino CA, US
Yixiong Yang - Fremont CA, US
Yong Wu - Sunnyvale CA, US
Wei V. Tang - Santa Clara CA, US
Srinivas Gandikota - Santa Clara CA, US
Yongjing Lin - San Jose CA, US
Karla M Bernal Ramos - San Jose CA, US
Shih Chung Chen - Cupertino CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 27/11556
H01L 21/285
H01L 21/67
H01L 21/28
C23C 16/06
H01L 21/311
C23C 16/50
C23C 16/455
H01L 29/423
H01L 21/285
H01L 21/67
H01L 21/28
C23C 16/06
H01L 21/311
C23C 16/50
C23C 16/455
H01L 29/423
Abstract:
Methods of forming memory structures are discussed. Specifically, methods of forming 3D NAND devices are discussed. Some embodiments form memory structures with a metal nitride barrier layer, an α-tungsten layer, and a bulk metal material. The barrier layer comprises a TiXN or TaXN material, where X comprises a metal selected from one or more of aluminum (Al), silicon (Si), tungsten (W), lanthanum (La), yttrium (Yt), strontium (Sr), or magnesium (Mg).
Method Of Tuning Film Properties Of Metal Nitride Using Plasma
View pageUS Patent:
20210351071, Nov 11, 2021
Filed:
May 11, 2020
Appl. No.:
16/871400
Inventors:
- Santa Clara CA, US
Wei TANG - Santa Clara CA, US
Srinivas GANDIKOTA - Santa Clara CA, US
Yixiong YANG - San Jose CA, US
Yong WU - Mountain View CA, US
Jianqiu GUO - Santa Clara CA, US
Arkaprava DAN - Santa Clara CA, US
Mandyam SRIRAM - San Jose CA, US
Wei TANG - Santa Clara CA, US
Srinivas GANDIKOTA - Santa Clara CA, US
Yixiong YANG - San Jose CA, US
Yong WU - Mountain View CA, US
Jianqiu GUO - Santa Clara CA, US
Arkaprava DAN - Santa Clara CA, US
Mandyam SRIRAM - San Jose CA, US
International Classification:
H01L 21/768
H01L 21/285
H01L 21/285
Abstract:
A method for forming a metal nitride layer on a substrate includes exposing a substrate having features formed therein to a first deposition gas mixture including metal source material in a processing chamber to deposit metal source material in the features, supplying a first purge gas mixture into the processing chamber to remove excess metal source material and reaction byproducts from the processing chamber, exposing the substrate to a second deposition gas mixture including a nitride source compound in the processing chamber to form no more than one monolayer of metal nitride, supplying a second purge gas mixture into the processing chamber to remove excess nitride source compound and reaction byproducts from the processing chamber, and exposing the substrate to plasma using a microwave plasma source.
Liner For V-Nand Word Line Stack
View pageUS Patent:
20200373318, Nov 26, 2020
Filed:
May 18, 2020
Appl. No.:
16/876280
Inventors:
- Santa Clara CA, US
Yixiong Yang - Fremont CA, US
Yong Wu - Sunnyvale CA, US
Wei V. Tang - Santa Clara CA, US
Srinivas Gandikota - Santa Clara CA, US
Yongjing Lin - San Jose CA, US
Karla M. Barnal Ramos - San Jose CA, US
Shih Chung Chen - Cupertino CA, US
Yixiong Yang - Fremont CA, US
Yong Wu - Sunnyvale CA, US
Wei V. Tang - Santa Clara CA, US
Srinivas Gandikota - Santa Clara CA, US
Yongjing Lin - San Jose CA, US
Karla M. Barnal Ramos - San Jose CA, US
Shih Chung Chen - Cupertino CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
H01L 27/11556
H01L 21/285
H01L 21/67
H01L 21/28
H01L 29/423
H01L 21/311
C23C 16/50
C23C 16/455
C23C 16/06
H01L 21/285
H01L 21/67
H01L 21/28
H01L 29/423
H01L 21/311
C23C 16/50
C23C 16/455
C23C 16/06
Abstract:
Methods of forming memory structures are discussed. Specifically, methods of forming 3D NAND devices are discussed. Some embodiments form memory structures with a metal nitride barrier layer, an α-tungsten layer, and a bulk metal material. The barrier layer comprises a TiXN or TaXN material, where X comprises a metal selected from one or more of aluminum (Al), silicon (Si), tungsten (W), lanthanum (La), yttrium (Yt), strontium (Sr), or magnesium (Mg).
Conformal Doped Amorphous Silicon As Nucleation Layer For Metal Deposition
View pageUS Patent:
20200335334, Oct 22, 2020
Filed:
Oct 9, 2018
Appl. No.:
16/754619
Inventors:
- Santa Clara CA, US
Yihong Chen - San Jose CA, US
Yong Wu - Sunnyvale CA, US
Abhijit Basu Mallick - Palo Alto CA, US
Srinivas Gandikota - Santa Clara CA, US
Yihong Chen - San Jose CA, US
Yong Wu - Sunnyvale CA, US
Abhijit Basu Mallick - Palo Alto CA, US
Srinivas Gandikota - Santa Clara CA, US
International Classification:
H01L 21/02
H01L 21/285
H01L 21/285
Abstract:
Methods for depositing a metal film on a doped amorphous silicon layer as a nucleation layer and/or a glue layer on a substrate. Some embodiments further comprise the incorporation of a glue layer to increase the ability of the doped amorphous silicon layer and metal layer to stick to the substrate.
Tungsten Deposition Without Barrier Layer
View pageUS Patent:
20200027738, Jan 23, 2020
Filed:
Sep 30, 2019
Appl. No.:
16/588235
Inventors:
- Santa Clara CA, US
Yong Wu - Sunnyvale CA, US
Chia Cheng Chin - Santa Clara CA, US
Srinivas Gandikota - Santa Clara CA, US
Yong Wu - Sunnyvale CA, US
Chia Cheng Chin - Santa Clara CA, US
Srinivas Gandikota - Santa Clara CA, US
International Classification:
H01L 21/285
H01L 21/02
H01L 21/768
H01L 21/3205
H01L 21/02
H01L 21/768
H01L 21/3205
Abstract:
Methods for depositing a metal film without the use of a barrier layer are disclosed. Some embodiments comprise forming an amorphous nucleation layer comprising one or more of silicon or boron and forming a metal layer on the nucleation layer.
Nucleation-Free Gap Fill Ald Process
View pageUS Patent:
20190371662, Dec 5, 2019
Filed:
Nov 29, 2017
Appl. No.:
16/467669
Inventors:
- Santa Clara CA, US
Kelvin Chan - San Ramon CA, US
Xinliang Lu - Fremont CA, US
Srinivas Gandikota - Santa Clara CA, US
Yong Wu - Sunnyvale CA, US
Susmit Singha Roy - Sunnyvale CA, US
Chia Cheng Chin - Santa Clara CA, US
Kelvin Chan - San Ramon CA, US
Xinliang Lu - Fremont CA, US
Srinivas Gandikota - Santa Clara CA, US
Yong Wu - Sunnyvale CA, US
Susmit Singha Roy - Sunnyvale CA, US
Chia Cheng Chin - Santa Clara CA, US
International Classification:
H01L 21/768
H01L 21/285
H01L 21/687
H01L 23/532
C23C 16/455
C23C 16/02
C23C 16/458
H01L 21/285
H01L 21/687
H01L 23/532
C23C 16/455
C23C 16/02
C23C 16/458
Abstract:
Processing methods comprise forming a gap fill layer comprising tungsten or molybdenum by exposing a substrate surface having at least one feature thereon sequentially to a metal precursor and a reducing agent comprising hydrogen to form the gap fill layer in the feature, wherein there is not a nucleation layer between the substrate surface and the gap fill layer.
Seam Healing Using High Pressure Anneal
View pageUS Patent:
20190228982, Jul 25, 2019
Filed:
Jan 14, 2019
Appl. No.:
16/246711
Inventors:
- Santa Clara CA, US
Rui Cheng - Santa Clara CA, US
Pramit Manna - Santa Clara CA, US
Abhijit Basu Mallick - Fremont CA, US
Shishi Jiang - Santa Clara CA, US
Yong Wu - Mountain View CA, US
Kurtis Leschkies - San Jose CA, US
Srinivas Gandikota - Santa Clara CA, US
Rui Cheng - Santa Clara CA, US
Pramit Manna - Santa Clara CA, US
Abhijit Basu Mallick - Fremont CA, US
Shishi Jiang - Santa Clara CA, US
Yong Wu - Mountain View CA, US
Kurtis Leschkies - San Jose CA, US
Srinivas Gandikota - Santa Clara CA, US
International Classification:
H01L 21/3105
C23C 16/56
H01L 21/02
C23C 16/56
H01L 21/02
Abstract:
Aspects of the disclosure include methods of processing a substrate. The method includes depositing a conformal layer on a substrate which contains seams. The substrate is treated using a high pressure anneal in the presence of an oxidizer.