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Xuebin Yao

from Austin, TX
Deceased
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Related to:
Sarah J Burke, 54Ying Lou, 50Kathleen R Allen, 85Bingsheng Yang, 81Chi Yang, 49Linuo Allen, 48Yao Li, 54Yao Xuebin, 54Guoshun Yang, 37Lingui Yang, 60Yannuo X Yang, 52
Connected to:
Angus M Yao, 35Bai Y Yao, 73Baiyun Yao, 40Bella L Yao, 41Bingxin Yao, 36Caroline A Yao, 42Cecilia Yao, 52Chan H Yao, 63Chao H Yao, 52Chongde D Yao, 91

Xuebin Yao Phones & Addresses

  • 8313 Canola Bnd, Austin, TX 78729 (512) 336-0851
  • 4263 Calle Mar De Ballenas, San Diego, CA 92130
  • 9245 Citrus View Ct, San Diego, CA 92126

Skills

Arm • Embedded Software • Firmware • Embedded Linux • Computer Networking • Embedded Systems • Soc • Device Drivers • Rtos • Lin • Linux Kernel • Debugging • Tcl • Kernel • Software Engineering

Industries

Computer Networking

Resumes

Resumes

Xuebin Yao Photo 1

Xuebin Yao

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Location:
San Diego, CA
Industry:
Computer Networking
Skills:
Arm
Embedded Software
Firmware
Embedded Linux
Computer Networking
Embedded Systems
Soc
Device Drivers
Rtos
Lin
Linux Kernel
Debugging
Tcl
Kernel
Software Engineering

Publications

Us Patents

Load Balancing And Failover

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US Patent:
7760626, Jul 20, 2010
Filed:
Mar 31, 2004
Appl. No.:
10/815349
Inventors:
Navneet Malpani - Austin TX, US
Xuebin Yao - Austin TX, US
Charles A. Musta - Austin TX, US
Assignee:
INTEL Corporation - Santa Clara CA
International Classification:
H04L 12/28
US Classification:
370230, 3703954, 370428
Abstract:
Provided are techniques for static load balancing. For each data path in a network adapter team, a load balancing value is computed. A maximum value of the computed load balancing values is determined. A data path with the maximum value is selected for use in routing data. Also provided are techniques for dynamic load balancing in which, when a load balancing share of a data path is less than an actual load balancing share, the load balancing share of the data path is adjusted. Furthermore, provided are techniques for failover processing in which a command is routed through a second network adapter in response to determining that the command may not be routed through a first network adaptor.

Error Detection And Recovery In A Storage Driver

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US Patent:
7373549, May 13, 2008
Filed:
Apr 6, 2004
Appl. No.:
10/819416
Inventors:
Navneet Malpani - Austin TX, US
Xuebin Yao - Austin TX, US
Charles A. Musta - Austin TX, US
Mikal N. Hart - Austin TX, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 11/00
US Classification:
714 17, 714 4, 714 15, 714 16, 719321, 719326
Abstract:
A command is received, at a network storage driver, from an operating system storage stack, wherein the command is for communication with a target storage device over a connection across a network. The command is selectively executed, a plurality of times over the connection, for communicating with the target storage device, in response to a determination that the command failed to successfully communicate with the target storage device within a threshold period of time.

Management Of Offload Operations In A Network Storage Driver

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US Patent:
20050246443, Nov 3, 2005
Filed:
Mar 31, 2004
Appl. No.:
10/815897
Inventors:
Xuebin Yao - Austin TX, US
Navneet Malpani - Austin TX, US
International Classification:
G06F015/16
US Classification:
709227000
Abstract:
A network storage driver requests a connection from an offload application, wherein the offload application interfaces with a first network stack implemented in an operating system and a second network stack implemented in a hardware device. The connection is received from the offload application, wherein the received connection is an offloaded connection and is reserved for the network storage driver. Data is communicated over the offloaded connection through the hardware device.

Method And Apparatus For Supporting Port Aggregation Of Serial Attached Scsi Wide Ports Via Virtual Ports

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US Patent:
20060194386, Aug 31, 2006
Filed:
Feb 25, 2005
Appl. No.:
11/065972
Inventors:
Xuebin Yao - Austin TX, US
Gary Kotzur - Austin TX, US
Sompong Olarig - Pleasanton CA, US
International Classification:
H01L 21/336
US Classification:
438257000
Abstract:
An SAS RAID adapter comprises an input-output processor (IOP) and at least two SAS input-output controllers (IOCs). Wherein SAS links coupled to each of the IOCs form “virtual ports” in order to increase performance and maintain availability. The virtual ports across the at least two IOCs have wide port SAS link capability so as to provide performance enhancements similar to a standard SAS wide port. Even if a single IOC failure occurs, downshifting to N/2 links is provided with degraded aggregated bandwidth (data throughput) instead of a failover and/or system shutdown.

Systems And Methods For Message Tunneling

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US Patent:
20210294761, Sep 23, 2021
Filed:
Jun 3, 2021
Appl. No.:
17/338654
Inventors:
- Suwon-si, KR
Zvi GUZ - Palo Alto CA, US
Son T. PHAM - San Ramon CA, US
Anahita SHAYESTEH - Los Altos CA, US
Xuebin YAO - San Diego CA, US
Oscar Prem PINTO - San Jose CA, US
International Classification:
G06F 13/16
G06F 13/42
G06F 9/54
G06F 3/06
Abstract:
According to one general aspect, a device may include a host interface circuit configured to communicate with a host device via a data protocol that employs data messages. The device may include a storage element configured to store data in response to a data message. The host interface circuit may be configured to detect when a tunneling command is embedded within the data message; extract a tunneled message address information from the data message; retrieve, via the tunneled message address information, a tunneled message stored in a memory of the host device; and route the tunneled message to an on-board processor and/or data processing logic. The on-board processor and/or data processing logic may be configured to execute one or more instructions in response to the tunneled message.

Device And Method For Verifying A Component Of A Storage Device

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US Patent:
20210248049, Aug 12, 2021
Filed:
Apr 1, 2020
Appl. No.:
16/837942
Inventors:
- Suwon-si, KR
Xuebin Yao - San Diego CA, US
International Classification:
G06F 11/22
Abstract:
A storage device configured for hardware verification is disclosed. The storage device comprises a first hardware component comprising a connector and a first verification logic. The first validation logic is configured to detect a criterion and generate a first signal via the connector in response to detecting the criterion. The storage device also comprises a second hardware component coupled to the first hardware component via the connector. The second hardware component comprises a second validation logic, where the second validation logic is configured to monitor and receive the first signal via the connector. In response to receiving the first signal, the second validation logic is configured to compare the received first signal to an expected signal and generate a result. The storage device is configured to take an action in response to the result.

Systems And Methods For Message Tunneling

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US Patent:
20210089477, Mar 25, 2021
Filed:
Feb 18, 2020
Appl. No.:
16/794217
Inventors:
- Suwon-si, KR
Zvi GUZ - Palo Alto CA, US
Son T. PHAM - San Ramon CA, US
Anahita SHAYESTEH - Los Altos CA, US
Xuebin YAO - San Diego CA, US
Oscar Prem PINTO - San Jose CA, US
International Classification:
G06F 13/16
G06F 13/42
G06F 9/54
G06F 3/06
Abstract:
According to one general aspect, a device may include a host interface circuit configured to communicate with a host device via a data protocol that employs data messages. The device may include a storage element configured to store data in response to a data message. The host interface circuit may be configured to detect when a tunneling command is embedded within the data message; extract a tunneled message address information from the data message; retrieve, via the tunneled message address information, a tunneled message stored in a memory of the host device; and route the tunneled message to an on-board processor and/or data processing logic. The on-board processor and/or data processing logic may be configured to execute one or more instructions in response to the tunneled message.

System And Method For Providing In-Storage Acceleration (Isa) In Data Storage Devices

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US Patent:
20200341933, Oct 29, 2020
Filed:
Jul 14, 2020
Appl. No.:
16/928711
Inventors:
- Suwon-si, KR
Fred Worley - San Jose CA, US
Xuebin YAO - San Diego CA, US
International Classification:
G06F 13/42
H04L 12/931
G06F 3/06
G06F 9/4401
G06F 13/16
G06F 13/40
Abstract:
A data storage device includes: a data storage medium; a processor comprising a plurality of processor cores; a plurality of application acceleration black-box (AABB) slots including reconfigurable logic blocks, interconnects, and memories; a host interface that receives a host command from a remote application running on a remote host computer, wherein the host command includes an image file including a register-transfer level (RTL) bitstream and a firmware driver; and a configuration controller that downloads the RTL bitstream to an AABB slot of the plurality of AABB slots and reconfigure the AABB slot, and load the firmware driver to a processor core of the processor. The processor core loaded with the firmware driver runs a data acceleration process of the remote application to access and process data stored in the data storage medium using the RTL bitstream downloaded in the AABB slot.
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Xuebin Yao from Austin, TXDeceased Get Report