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Wern Ming Koe

from Irving, TX
Age ~47
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Also known as:
Wern M Koe, Ming Koe Wern, Wern C Koe, Koe Wern, Wern Wern, G Koe
Related to:
Hsiao Y Yang, 56
Connected to:
Benjamin C Koe, 67Dany K Koe, 36Dewi K Koe, 47Zugeith Koe, 47Richard J Koebbeman, 78Lauren H Koebcke, 44Geneva A Koebel, 81Jessica L Koebel, 52Nancy K Koebel, 73Patrick R Koebel, 42

Wern Koe Phones & Addresses

  • Irving, TX
  • 7421 Frankford Rd, Dallas, TX 75252 (972) 519-8327
  • 11991 Audelia Rd, Dallas, TX 75243
  • Tempe, AZ

Resumes

Resumes

Wern Koe Photo 1

Analog And Mixed-Signal Design Lead, Principal Engineer

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Location:
1050 east Arques Ave, Sunnyvale, CA 94085
Industry:
Semiconductors
Work:
Ams Ag
Analog and Mixed-Signal Design Lead, Principal Engineer
Globalfoundries
Principal Member of Technical Staff at Globalfoundries
Nvidia Jan 2013 - Aug 2015
Senior Mixed Signal Design Engineer
Samsung Jul 2012 - Dec 2012
Staff Hardware Engineer and Manager
Dongbu Hitek Apr 2010 - Jul 2012
Senior Staff, Analog and Mixed-Signal and Rf Ic Design
Education:
Arizona State University 1998 - 2000
Arizona State University 1995 - 1998
Bachelors, Bachelor of Science, Electrical Engineering
Skills:
Analog
Ic
Analog Circuit Design
Mixed Signal
Integrated Circuit Design
Semiconductors
Asic
Cmos
Debugging
Soc
Rf
Simulations
Fpga
Matlab
Eda
Characterization
Cadence Virtuoso
Integrated Circuits
Adcs
Mixed Signal Ic Design
Analog Circuits
Simulink
Analog Filters
Amplifiers
Data Acquisition
Cadence Spectre
Ic Layout
Board Layout
Dacs
Ldo
Data Conversion
Sigma Delta
Tv Tuner Ic
Mentoring
Behavioral Modeling
Medical Imaging
Analog Signal Processing
Signal Conditioning
Linear Regulators
Circuit Design
Power Management
Testing
Semiconductor Industry
Electrical Engineering
Fdsoi
Finfet
Wern Koe Photo 2

Wern Koe

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Location:
Dallas, TX
Industry:
Semiconductors
Wern Koe Photo 3

Staff Hardware Engineer At Nvidia

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Position:
Staff Hardware Engineer at NVIDIA
Location:
Dallas/Fort Worth Area
Industry:
Semiconductors
Work:
NVIDIA - Richardson, Texas since Jan 2013
Staff Hardware Engineer
Education:
Arizona State University 1998 - 2000
Arizona State University 1995 - 1998
Skills:
Analog Circuit Design
Mixed-Signal IC Design
Integrated Circuit Design
Analog Circuits
Mixed Signal
Analog
Characterization
ASIC
IC
SoC
Semiconductors
CMOS
EDA
Cadence Virtuoso
Cadence Spectre
Matlab
Simulink
Verilog-A
Simulations
IC layout
Board Layout
ADCs
DACs
Amplifiers
Analog Filters
Sigma-Delta

Publications

Us Patents

Systems And Methods For Kickback Reduction In An Adc

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US Patent:
7605732, Oct 20, 2009
Filed:
Jan 29, 2007
Appl. No.:
11/668006
Inventors:
Wern M. Koe - Dallas TX, US
Yong-In Park - Allen TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H03M 3/00
US Classification:
341142, 341155, 341172
Abstract:
Various systems and methods for analog to digital conversion are disclosed. For example, some embodiments of the present invention provide analog to digital conversion systems. The analog to digital conversion systems include a first integrator and a second integrator, and a first summation element and a second summation element. An output of the first summation element is electrically coupled to the first integrator, and an output of the first integrator is electrically coupled to the second integrator. An output of the second integrator is electrically coupled to the second summation element. The analog to digital conversion systems further include an analog to digital converter that is electrically coupled to the first summation element via a digital to analog converter. An input to the analog to digital conversion system is electrically coupled to the first summation element, and the input is electrically coupled to the second summation element via a kickback filter.

Apparatus And Method For Sigma Delta Signal Treatment

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US Patent:
20070096962, May 3, 2007
Filed:
Oct 27, 2005
Appl. No.:
11/260103
Inventors:
Wern Koe - Dallas TX, US
Yong-In Park - Allen TX, US
International Classification:
H03M 3/00
US Classification:
341143000
Abstract:
A sigma delta signal treating apparatus includes: (a) a low pass filtered signal path including at least one low pass filter; and (b) a quantization noise filtered signal path coupled with the low pass filtered signal path; the quantization noise filtered signal path including at least one high pass filter and at least one feedback notch filter.

Delta-Sigma Analog-To-Digital Converters And Methods To Calibrate Delta-Sigma Analog-To-Digital Converters

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US Patent:
20100073207, Mar 25, 2010
Filed:
Sep 22, 2008
Appl. No.:
12/235348
Inventors:
Amit Kumar Gupta - Plano TX, US
Karthikeyan Soundarapandian - Plano TX, US
Yong-In Park - Allen TX, US
Wern Ming Koe - Irving TX, US
Assignee:
TEXAS INSTRUMENTS INCORPORATED - Dallas TX
International Classification:
H03M 3/00
H03M 1/12
H03M 1/10
US Classification:
341120, 341143, 341155
Abstract:
Delta-sigma analog-to-digital converters (ADCs) and methods to calibrate methods to delta-sigma ADCs are disclosed. In one particular example, a delta-sigma ADC is described, including an n-bit feedback digital-to-analog converter (DAC) having a number of unit elements, and is configured to provide a feedback signal to a summing device, which generates a difference signal based on an analog input signal and the feedback signal. An n-bit ADC is included to generate an n-bit digital signal based on the difference signal. A dynamic element matching device selects one or more unit elements in the DAC based on the n-bit digital signal. A storage device, such as a memory, stores error coefficients corresponding to the plurality of unit elements. Finally, a digital corrector is included to receive the selection of unit elements, receive error coefficients corresponding to the selected unit elements, and adjust the n-bit digital signal based on the received error coefficients.

Switched-Capacitor Charge Pump With Reduced Diode Threshold Voltage And On State Resistance

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US Patent:
20180337596, Nov 22, 2018
Filed:
May 19, 2017
Appl. No.:
15/599596
Inventors:
- GRAND CAYMAN, KY
Wern Ming KOE - Irving TX, US
International Classification:
H02M 3/07
H03K 5/1532
Abstract:
The present disclosure relates to a structure which includes a diode-based Dickson charge pump which is configured to use an independent multi-gate device to reduce a threshold voltage of a plurality of transistor diodes during a charging and pumping phase.
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Wern Ming Koe from Irving, TX, age ~47 Get Report