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Vasanth Bala

from Rye, NY
Age ~62
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Also known as:
Vasanth Balasundaram, Balasundaram Vasanth, Bala Vasanth
Phone and address:
112 Midland Ave, Rye, NY 10580
(914) 921-1879
Related to:
Kavitha B VasanthMihir Bala, 25
Connected to:
Amanda L Bala, 48Aruna Bala, 30Ashika V Bala, 44Ashley Bala, 30Atif D Bala, 34Devi Bala, 61Frederick A Bala, 60Gabriela E Bala, 32Jana M Bala, 52Kristine H Bala, 43

Vasanth Bala Phones & Addresses

  • 112 Midland Ave, Rye, NY 10580 (914) 921-1879
  • 2168 Crescent Dr, Tarrytown, NY 10591 (914) 366-6106
  • Sleepy Hollow, NY
  • Sudbury, MA
  • Peekskill, NY
  • Houston, TX
  • Cortlandt Manor, NY
  • Westchester, NY
  • Wellesley, MA
  • Chestnut Hill, MA
  • 112 Midland Ave, Rye, NY 10580 (914) 443-8935

Work

Company: Google Nov 2014 Position: Technical leader and manager

Education

Degree: Master of Science, Doctorates, Masters, Doctor of Philosophy School / High School: Rice University 1983 to 1989 Specialities: Computer Science

Skills

Distributed Systems • Virtualization • Cloud Computing • Software Development • Software Engineering • Computer Science • Linux • System Architecture • Architecture • Unix • Big Data • Enterprise Architecture • Technical Leadership • Python • It Strategy • Enterprise Software • High Performance Computing • Architectures • Agile Methodologies • Perl • Parallel Computing • Saas • Cloud Applications • High Availability • Solution Architecture • Analytics

Languages

Hindi

Industries

Computer Software

Resumes

Resumes

Vasanth Bala Photo 1

Technical Leader And Manager

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Location:
New York, NY
Industry:
Computer Software
Work:
Google
Technical Leader and Manager
Ibm 2001 - Oct 2014
Distinguished Research Staff Member
Liquid Machines 2000 - 2001
Founder
Opelin 1994 - 2000
Senior Scientist
Kendall Square Research 1993 - 1994
Compiler Engineer
Education:
Rice University 1983 - 1989
Master of Science, Doctorates, Masters, Doctor of Philosophy, Computer Science
Skills:
Distributed Systems
Virtualization
Cloud Computing
Software Development
Software Engineering
Computer Science
Linux
System Architecture
Architecture
Unix
Big Data
Enterprise Architecture
Technical Leadership
Python
It Strategy
Enterprise Software
High Performance Computing
Architectures
Agile Methodologies
Perl
Parallel Computing
Saas
Cloud Applications
High Availability
Solution Architecture
Analytics
Languages:
Hindi

Publications

Us Patents

Method For Selecting Active Code Traces For Translation In A Caching Dynamic Translator

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US Patent:
6351844, Feb 26, 2002
Filed:
Nov 5, 1998
Appl. No.:
09/186945
Inventors:
Vasanth Bala - Sudbury MA
Assignee:
Hewlett-Packard Company - Palo Alto CA
International Classification:
G06F 945
US Classification:
717 4, 717 7, 717 9, 712209, 712227
Abstract:
A method is shown for selecting active, or hot, code traces in an executing program for storage in a code cache. A trace is a sequence of dynamic instructions characterized by a start address and a branch history which allows the trace to be dynamically disassembled. Each trace is terminated by execution of a trace terminating condition which is a backward taken branch, an indirect branch, or a branch whose execution causes the branch history for the trace to reach a predetermined limit. As each trace is generated by the executing program, it is loaded into a buffer for processing. When the buffer is full, a counter corresponding to the start address of each trace is incremented. When the count for a start address exceeds a threshold, then the start address is marked as being hot. Each hot trace is then checked to see if the next trace in the buffer shares the same start address, in which case the hot trace is cyclic. If the start address of the next trace is not the same as the hot trace, then the traces in the buffer are checked to see they form a larger cycle of execution.

Low Overhead Speculative Selection Of Hot Traces In A Caching Dynamic Translator

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US Patent:
6470492, Oct 22, 2002
Filed:
May 14, 1999
Appl. No.:
09/312296
Inventors:
Vasanth Bala - Sudbury MA
Evelyn Duesterwald - Boston MA
Assignee:
Hewlett-Packard Company - Palo Alto CA
International Classification:
G06F 944
US Classification:
717128
Abstract:
A method and apparatus for selecting hot traces for translation and/or optimization is described in the context of a caching dynamic translator. The code cache stores hot traces. Profiling is done at locations that satisfy a start-of-trace condition, e. g. , the targets of backward taken branches. A hot target of a backward taken branch is speculatively identified as the beginning of a hot trace, without the need to profile the blocks that make up the trace. The extent of the speculatively selected hot trace is determined by an end-of-trace condition, such as a backward taken branch or a number of interpreted or native instructions. The interpreter is augmented with a mode in which it emits native instructions that are cached. A trace is cached by identifying a hot start of a trace and then continuing interpretation while storing the emitted native instruction stream until an end-of-trace condition is met.

Method And System For Fast Unlinking Of A Linked Branch In A Caching Dynamic Translator

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US Patent:
6725335, Apr 20, 2004
Filed:
Jan 5, 2001
Appl. No.:
09/755780
Inventors:
Vasanth Bala - Sudbury MA
Evelyn Duesterwald - Somerville MA
Sanjeev Banerjia - Cambridge MA
Assignee:
Hewlett-Packard Development Company, L.P. - Houston TX
International Classification:
G06F 1200
US Classification:
711125, 711118, 717 9, 712233, 712237, 714 35
Abstract:
In a system and method for linking and unlinking code fragments stored in a code cache, a memory area is associated with a branch in a first code fragment that branches outside the cache. If the branch can be set to branch to a location in a second code fragment stored in the cache, branch reconstruction information is stored in the memory area associated with the branch, and the branch instruction is updated to branch to the location in the second code fragment, thereby linking the first code fragment to the second code fragment. If it is determined that the previously linked branch should be unlinked, the first and second code fragments at that branch are unlinked by reading the information stored in the associated memory area at the time of linking, and using that information to reset the branch to its state prior to the linking.

Secondary Trace Build From A Cache Of Translations In A Caching Dynamic Translator

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US Patent:
6785801, Aug 31, 2004
Filed:
Jan 5, 2001
Appl. No.:
09/755382
Inventors:
Evelyn Duesterwald - Somerville MA
Vasanth Bala - Sudbury MA
Sanjeev Banerjia - Cambridge MA
Assignee:
Hewlett-Packard Development Company, L.P. - Houston TX
International Classification:
G06F 1300
US Classification:
712209, 712227
Abstract:
A method for growing a secondary trace out of a cache of translations for a program during the programs execution in a dynamic translator, comprising the steps of: maintaining execution counts for translation heads that are executed from a code cache; when an execution count for one of said translation heads exceeds a threshold, designated as a hot translation head, beginning a mode of operation in which, as following code translations are executed from the code cache after the execution of the hot translation head, storing in a history buffer information identifying each of the following code translations in sequence; terminating the storing of information in the history buffer in relation to the hot translation head when a termination condition is met; and linking together the translation head and the sequence of following code translations identified in the history buffer to form a larger code translation.

Memory Disambiguation Scheme For Partially Redundant Load Removal

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US Patent:
6813705, Nov 2, 2004
Filed:
Jan 5, 2001
Appl. No.:
09/755774
Inventors:
Evelyn Duesterwald - Somerville MA
Vasanth Bala - Sudbury MA
Sanjeev Banerjia - Cambridge MA
Assignee:
Hewlett-Packard Development Company, L.P. - Houston TX
International Classification:
G06F 1200
US Classification:
712216
Abstract:
An optimization scheme used at run-time or compile-time is capable of identifying partially redundant loads and determining whether the load is truly redundant. The truly redundant load may be replaced with a register copy instruction to reduce the memory traffic and save CPU cycle time.

Method And Apparatus For Ordered Predicate Phi In Static Single Assignment Form

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US Patent:
6898787, May 24, 2005
Filed:
Mar 22, 2001
Appl. No.:
09/814511
Inventors:
Carol Linda Thompson - San Jose CA, US
Vatsa Santhanam - Campbell CA, US
Vasanth Bala - Sudbury MA, US
Assignee:
Hewlett-Packard Development Company, L.P. - Houston TX
International Classification:
G06F009/45
US Classification:
717152, 717141, 717142, 717158, 717159
Abstract:
A Φ function provides a mechanism for static single assignment in the presence of predicated code. Guards placed on each source operand of the Φ function indicate the condition under which the corresponding source operand is live and provide correct materialization of the Φ functions after code reordering. For control functions Φrepresenting a confluence of live reaching definitions at a join point in the control flow graph, the guards indicate the basic block which is the source of the edge associated with the source operand. The Φoperands are paired with the source basic block of the incoming edge(s) along which they are live. The operands are also ordered according to a topological ordering of their associated block. This ordering is maintained through subsequent code transformations. In the topological ordering, the source of the edge from which the definition was passed is defined.

Method And System For Protecting Software Applications Against Static And Dynamic Software Piracy Techniques

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US Patent:
7111285, Sep 19, 2006
Filed:
Jul 16, 2002
Appl. No.:
10/197063
Inventors:
Michael D. Smith - Lexington MA, US
Vasanth Bala - Tarrytown NY, US
Assignee:
Liquid Machines, Inc. - Waltham MA
International Classification:
G06F 9/45
G06F 9/00
G06F 7/04
G06F 11/30
US Classification:
717140, 726 21, 726 30, 713189
Abstract:
An application module is rewritten by overwriting executable code at identified authorization points with control transfers to a managed challenge system such that a rewritten application module results. The managed challenge system is constructed to include the overwritten executable code, and performs an authorization check upon acquiring control from an authorization point. The managed challenge system is linked to the rewritten application module.

Method For Protecting Digital Content From Unauthorized Use By Automatically And Dynamically Integrating A Content-Protection Agent

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US Patent:
7313824, Dec 25, 2007
Filed:
Jul 11, 2002
Appl. No.:
10/194655
Inventors:
Vasanth Bala - Tarrytown NY, US
Michael D. Smith - Lexington MA, US
Assignee:
Liquid Machines, Inc. - Waltham MA
International Classification:
H04L 9/32
US Classification:
726 27, 713187
Abstract:
A content processor application is loaded into memory from a master image to form a runtime content processor application image. An integration agent dynamically integrates a protection agent into the loaded runtime content processor application image to form a customized content processor application with extended functionality. Only the runtime content processor application image is extended with the protection agent—the application master image remains unaltered.
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Vasanth Bala from Rye, NY, age ~62 Get Report