US Patent:
20220374235, Nov 24, 2022
Inventors:
- West Lafayette IN, US
Terani N Vijaykumar - West Lafayette IN, US
Assignee:
Purdue Research Foundation - West Lafayette IN
International Classification:
G06F 9/30
G06F 9/38
G06F 12/0875
Abstract:
A method of verifying authenticity of a speculative load instruction is disclosed which includes receiving a new speculative source-destination pair (PAIR), wherein the source represents a speculative load instruction and the destination represents an associated destination virtual memory location holding data to be loaded onto a register with execution of the source, checking the PAIR against one or more memory tables associated with non-speculative source-destination pairs, if the PAIR exists in the one or more memory tables, then executing the instruction associated with the source of the PAIR, if the PAIR does not exist, then i) waiting until the speculation of the source instruction has cleared as being non-speculative, ii) updating the one or more memory tables, and iii) executing the instruction associated with the source, and if the speculation of the source instruction of the PAIR does not clear as non-speculative, then the source is nullified.