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Sule Sair Ozev

from Phoenix, AZ
Age ~53

Sule Ozev Phones & Addresses

  • 14640 S 4Th Ave, Phoenix, AZ 85045
  • 1 Curriculum Ct, Durham, NC 27713 (919) 484-1335
  • Chandler, AZ
  • Raleigh, NC
  • 9355 Discovery Way, La Jolla, CA 92037 (858) 458-0497
  • San Diego, CA
  • Cleveland, OH

Work

Company: Arizona state university Aug 2018 Position: Professor

Education

Degree: Doctorates, Doctor of Philosophy School / High School: Uc San Diego 1996 to 2002 Specialities: Computer Science, Philosophy

Skills

Simulations • Matlab • Verilog • Algorithms • Vhdl • Signal Processing • C • Vlsi • Circuit Design • Computer Architecture • Analog Circuit Design • Testing • Semiconductors • Latex • Fpga • Cadence Virtuoso • Computer Science • Distance Learning

Industries

Higher Education

Resumes

Resumes

Sule Ozev Photo 1

Professor

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Location:
Phoenix, AZ
Industry:
Higher Education
Work:
Arizona State University
Professor

Arizona State University
Associate Professor

Duke University Sep 2002 - Aug 2008
Assistant Professor
Education:
Uc San Diego 1996 - 2002
Doctorates, Doctor of Philosophy, Computer Science, Philosophy
Boğaziçi University 1990 - 1995
Bachelors, Bachelor of Science, Electrical Engineering
Skills:
Simulations
Matlab
Verilog
Algorithms
Vhdl
Signal Processing
C
Vlsi
Circuit Design
Computer Architecture
Analog Circuit Design
Testing
Semiconductors
Latex
Fpga
Cadence Virtuoso
Computer Science
Distance Learning

Publications

Us Patents

Self-Repairing Of Microprocessor Array Structures

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US Patent:
7694198, Apr 6, 2010
Filed:
Jun 12, 2008
Appl. No.:
12/138129
Inventors:
Sule Ozev - Durham NC, US
Paul G. Shealy - Rock Hill NC, US
Daniel J. Sorin - Durham NC, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G01R 31/28
US Classification:
714724, 714 5, 714710
Abstract:
A level of indirection is utilized when writing to a microprocessor array structure, thereby masking hard faults in the array structure. Among other benefits, this minimizes the use of a backward error recovery mechanism with its inherent delay for recovery. The indirection is used to effectively remove from use faulty portions of the array structure and substitute spare, functioning portions to perform the duties of the faulty portions. Thus, for example, faulty rows in microprocessor array structures are mapped out in favor of substitute, functioning rows.

Self-Repairing Of Microprocessor Array Structures

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US Patent:
20060101303, May 11, 2006
Filed:
Oct 22, 2004
Appl. No.:
10/971347
Inventors:
Fred Bower - Durham NC, US
Sule Ozev - Durham NC, US
Paul Shealy - Rock Hill SC, US
Daniel Sorin - Durham NC, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 11/00
US Classification:
714005000
Abstract:
A level of indirection is utilized when writing to a microprocessor array structure, thereby masking hard faults in the array structure. Among other benefits, this minimizes the use of a backward error recovery mechanism with its inherent delay for recovery. The indirection is used to effectively remove from use faulty portions of the array structure and substitute spare, functioning portions to perform the duties of the faulty portions. Thus, for example, faulty rows in microprocessor array structures are mapped out in favor of substitute, functioning rows.

Mismatch Detection Using Periodic Structures

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US Patent:
20230108249, Apr 6, 2023
Filed:
Sep 30, 2021
Appl. No.:
17/490644
Inventors:
- Scottsdale AZ, US
- Bengaluru, IN
Sule Ozev - Phoenix AZ, US
International Classification:
H04B 17/19
H04B 17/14
H04B 17/00
H04B 17/10
H04B 17/13
Abstract:
Mismatch detection using periodic structures is provided. Embodiments described herein can measure and detect mismatch between two loads in a radio frequency (RF) system without the need for external calibration by referencing their measurements into a small set of parameters that are intrinsic to the RF system design. This approach can be used to compare impedances of two loads and measure their impedances relative to each other without requiring any external calibration (e.g., the approach does not assume any prior known physical quantities in the system, such as a reference impedance). This approach can be used to compare the two loads to each other, as well as to quantify the amount of mismatch between these loads by calculating reflection coefficient between the loads. Loads can be passive devices, such as antennas, or they can be active devices, such as amplifiers.

Dynamic-Zoom Analog To Digital Converter (Adc) Having A Coarse Flash Adc And A Fine Passive Single-Bit Modulator

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US Patent:
20190363730, Nov 28, 2019
Filed:
May 25, 2018
Appl. No.:
15/990013
Inventors:
- Scottsdale AZ, US
Sule Ozev - Tempe AZ, US
International Classification:
H03M 3/00
Abstract:
A dynamic-zoom analog to digital converter (ADC) having a coarse flash ADC and a fine passive single-bit modulator is disclosed. Radio frequency (RF) devices incorporating aspects of the present disclosure may support multiple wireless modes operating at different frequencies. Therefore, the RF devices have need for an ADC which is flexible and optimizable in terms of resolution, bandwidth, and power consumption. In this regard, the RF devices incorporate circuits, such as ADC circuits, which incorporate a discrete-time passive delta-sigma modulator. In order to improve the resolution of the delta-sigma modulator, a coarse ADC is deployed as a zooming unit to a single-bit passive delta-sigma modulator to provide a coarse digital conversion. Coarse conversion is used to dynamically update reference voltages at an input of the delta-sigma modulator using a multi-bit feedback digital to analog converter (DAC). The dynamic-zoom ADC supports multiple modes with improved power and quantization noise.
Sule Sair Ozev from Phoenix, AZ, age ~53 Get Report