Inventors:
Indraneel Ghosh - Rancho Cordova CA
Chin Shu Tan - Folsom CA
Wenteh Pan - Gold River CA
Subeer Kamal Patel - Santa Clara CA
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G11C 700
Abstract:
A data storage device is provided. The data storage device, which is coupled to a data processing device, includes a memory array partitioning into a plurality of memory banks. The data storage device further includes a bank enable circuit for enabling at least one of the memory banks from the plurality of memory banks of the memory array. The data storage device also includes an operation/pseudooperation enable circuit (OPEC) for generating an operation or a pseudooperation signal to one or more banks enabled by the bank enable circuit. The OPEC has a first input for receiving an operation request signal from the data processing device and a second input. Additionally the data storage device includes a pseudooperation control circuit for controllably generating a pseudooperation request signal to the bank enable circuit and to the second input of the OPEC.