Son Anh Tran

20130099684, Apr 25, 2013

Oct 24, 2011

13/280151

WAI-KEUNG CHENG - Union City CA, US
Son Tran - San Jose CA, US

Alpha and Omega Semiconductor Incorporated - Sunnyvale CA

H05B 37/02

315186

Parallel light emitting diode channels may be controlled using a pulsed control signal input characterized by an input duty cycle and one or more current sense input signals. Each of the one or more current sense input signals is indicative of a current through a corresponding load channel of one or more load channels. One or more pulsed channel current control signals are provided to one or more corresponding dimming controls correspondingly coupled to the one or more load channels. Each of the dimming controls is configured to provide an output signal to a corresponding ON-OFF switch, each of which is coupled in series with a corresponding the load channels. The channel duty cycle of each channel current control signal is adjusted relative to the input duty cycle in response to the current sense input signals.

58755420, Mar 2, 1999

Apr 18, 1997

8/844511

Ut Tran - San Jose CA
Son Tran - Milpitas CA

Read-Rite Corporation - Milpitas CA

G11B 5127

2960314

Methods for fabricating merged magnetic heads, employing an inductive write head and a magnetoresistive (MR) read head which share portions of the overall magnetic structure, provide for accurate definition of the write track width and for improved alignment of the write gap and the read gap. The method includes accurately forming and defining the nonmagnetic write gap prior to fabricating the inductive write coil structure and subsequently formed higher topology elements. The methods provide for better control of the widths of the top pole member and the bottom pole member, thereby resulting in substantially equal widths for these pole members.

20200036375, Jan 30, 2020

Oct 7, 2019

16/595063

- Grand Cayman, KY
Wonjin Cho - Gyeonggi-Do, KR
Son Tran - San Jose CA, US

H03K 17/082
H03K 17/18
H05B 6/06
H03K 17/16
H02H 9/04
H02H 6/00

A method of generating a gate drive signal for driving a control terminal of a power switch includes detecting a system input signal; determining a signal pulse of the system input signal being a first signal pulse following a power up event, or following an idle period, or following removal of a fault condition; and in response, generating a soft gate drive signal to drive the control terminal of the power switch to softly turn on the power switch. In another embodiment, the method includes determining a duration of the on period of the system input signal exceeding a maximum on duration and in response, disabling the gate drive signal to turn off the power switch; and determining a deassertion transition of the system input signal and in response, blocking the system input signal from the gate drive signal for a minimum off duration.

20190006270, Jan 3, 2019

Sep 5, 2018

16/122690

- Grand Cayman, KY
Bum-Seok Suh - SEONGNAM-CITY, KR
Jun Lu - San Jose CA, US
Son Tran - San Jose CA, US
Wanki Hong - Bucheon-si, KR
Guobing Shen - Shanghai, CN
Xiaoguang Zeng - Shanghai, CN
Mary Jane R. Alin - Shanghai, CN

Alpha and Omega Semiconductor (Cayman) Ltd. - Grand Cayman

H01L 23/495
H01L 23/31
H01L 27/06

An intelligent power module (IPM) has a first, second, third and fourth die supporting elements, a first, second, third, fourth, fifth and sixth transistors, a connection member, a low voltage IC, a high voltage IC, a plurality of leads and a molding encapsulation. The first transistor is attached to the first die supporting element. The second transistor is attached to the second die supporting element. The third transistor is attached to the third die supporting element. The fourth, fifth and sixth transistor s are attached to the fourth die supporting element. The low and high voltage ICs are attached to the connection member. The molding encapsulation encloses the first, second, third and fourth die supporting elements, the first, second, third, fourth, fifth and sixth transistors, the connection member and the low and high voltage ICs. The IPM has a reduced thermal resistance of junction-to-case (RJC) compared to a conventional IPM.

20180269863, Sep 20, 2018

Mar 20, 2017

15/464136

- Grand Cayman, KY
Wonjin Cho - Gyeonggi-Do, KR
Son Tran - San Jose CA, US

H03K 17/082
H02H 9/04
H02H 6/00
H05B 6/06

An intelligent power module includes a power switch, a freewheeling device, and a controller circuit incorporating a gate drive circuit and one or more power switch protection circuits. In one embodiment, the power switch is an insulated gate bipolar transistor (IGBT) device, the freewheeling device is a PN junction diode, and the controller circuit is implemented as a semiconductor integrated circuit (IC). The power module implements protection functions for the power switching device where the protection circuits are formed on the controller circuit IC and co-packaged with the power switch. In some embodiments, the control circuit in the power module includes an active soft-start circuit which is activated to realize soft-start of the power switch. In other embodiments, the control circuit in the power module includes an active turn-on pulse control circuit to detect for abnormal system input signal pulse events and block system undesired input pulses.

20180145675, May 24, 2018

Nov 23, 2016

15/360590

- Sunnyvale CA, US
Wonjin Cho - Gyeonggi-Do, KR
Son Tran - San Jose CA, US

H03K 17/082
H02H 9/04
H02M 5/458
H02M 1/08
H05B 6/06

A controller for driving a power switch incorporates a protection circuit to protect the power switch from fault conditions, such as over-voltage conditions or power surge events. The protection circuit includes a fault detection circuit and a protection gate drive circuit. The fault detection circuit is configured to monitor the voltage across the power switch and to generate a fault detection indicator signal and the protection gate drive circuit is configured to generate a gate drive signal to turn on the power switch in response to a detected fault condition. In particular, the protection gate drive circuit generates a gate drive signal that has a slow assertion transition and is clamped at a given gate voltage value. In this manner, the protection circuit implements active clamping of the gate terminal of the power switch and safe handling of the power switch during over-voltage events.

20180109249, Apr 19, 2018

Oct 16, 2016

15/294778

- Sunnyvale CA, US
Zhiqiang Niu - Santa Clara CA, US
Wonjin Cho - Suwon-si, KR
Son Tran - San Jose CA, US
James Rachana Bou - Long Beach CA, US

Alpha and Omega Semiconductor (Cayman) Ltd. - Sunnyvale CA

H03K 17/041
H01L 23/31
H01L 25/07
H01L 23/495
H01L 23/00
H03K 17/081
H03K 17/16

A power module has a lead frame, a first power chip, a second power chip, a plurality of single in-line leads, a gate drive and protection integrated circuit (IC), a plurality of bonding wires and a molding encapsulation. The first and second power chips are attached to a top surface of the lead frame. The plurality of single in-line leads has a high voltage power lead, a low voltage power lead and a plurality of signal control leads. The low voltage power lead has a lead portion and an extension portion. The gate drive and protection IC is attached to the extension portion of the low voltage power lead. The molding encapsulation encloses the first and second power chips, the extension portion of the low voltage power lead, the gate drive and protection IC, the plurality of bonding wires and at least a majority portion of the lead frame.

20160259390, Sep 8, 2016

May 16, 2016

15/155911

- Sunnyvale CA, US
Zhiye Zhang - San Jose CA, US
Allen Chang - Fremont CA, US
Kuang Ming Chang - Fremont CA, US
Gilbert Lee - Seoul, KR
Son Tran - San Jose CA, US

G06F 1/30
G06F 1/28

A fault tolerant power supply system includes at least one load switch circuit configured to connect, using a main switch, an input voltage to an output node of the load switch circuit when the load switch circuit is turned on and at least one power channel coupled to the load switch circuit to receive the input voltage. The power channel is configured as a buck converter and includes at least a high-side power switch and a low-side power switch. The fault tolerant power supply system is configured to measure a current flowing through the main switch of the load switch circuit, to determine that the current flowing through the main switch of the load switch circuit has exceeded a current limit threshold, and to disable the main switch of the load switch circuit and the low-side power switch of the power channel in response to the determination that the current flowing in the main switch has exceeded the current limit threshold.