Sergio A Sanielevici

7701271, Apr 20, 2010

Sep 24, 2008

12/237355

Sergio Sanielevici - Redwood City CA, US
Katelijn Vleugels - San Carlos CA, US

Ozmo, Inc. - Palo Alto CA

H03L 7/06

327157, 327536

A charge pump configured for use in a phase-locked loop includes positive and negative current sources, transistor switches, voltage nodes and one or more operational amplifiers, wherein the positive and negative current sources each includes an output node, the output nodes are respectively connected sequentially to the voltage nodes having substantially the same voltage, the transistor switches are configured to sequentially switch such that at all times there is one transistor switch connection, and the currents flows through the transistor switches into one of the voltage nodes. One of the voltage nodes is connected to the PLL filter and the transistor switches are connected to the PLL filter and are controlled by the phase error pulses. Two voltage nodes are possible. The second node provides feedback.

60118164, Jan 4, 2000

Sep 18, 1996

8/715441

Sergio A. Sanielevici - Redwood City CA
Abhijit A. Shah - Sunnyvale CA

Wireless Access - Santa Clara CA

H04L 2722

375324

A demodulation circuit providing for detection of multiple zero-crossings in an FSK signal. High data rate signals are demodulated by generating, for each pair of baseband signals I and Q, additional I and Q pairs which are phase shifted from the original I and Q pair. By generating zero crossing signals for the original baseband signals and for the phase shifted signals, additional zero crossings may be detected allowing demodulation of relatively high data rate modulated signals.

60185538, Jan 25, 2000

Sep 18, 1996

8/715442

Sergio A. Sanielevici - Los Altos CA
Stephen F. Lloyd - Palo Alto CA
Kenneth R. Cioffi - Milpitas CA

Wireless Access - Santa Clara CA

H03D 300
H04L 2714

375334

A multi-level quadrature (I/Q) mixer for use in a communication system such as a paging device, where the mixer includes first and second I/Q downconversions followed by demodulation. The first I/Q downconversion converts an I/Q signal pair to a first IF, and the second I/Q downconversion converts an I/Q signal pair to a second IF. The first IF may or may not be the center frequency depending on the number of subchannels in the single channel being downconverted.

54304008, Jul 4, 1995

Aug 3, 1993

8/100975

Richard F. Herlein - San Jose CA
Sergio A. Sanielevici - Los Altos CA
Burnell G. West - Fremont CA
David K. Cheung - Milpitas CA

Schlumberger Technologies Inc. - San Jose CA

H03K 301
H03K 1900

327108

Driver circuits are provided which also serve as termination and clamp in an IC tester. When it is to drive a port of a device under test (DUT) between two predetermined voltage levels, the driver's I/O terminal is switched between two predetermined voltage levels with an output impedance that matches the transmission line between the driver circuit and the DUT. When the DUT's port is supplying an output signal, the driver circuit can be programmed to provide one of two types of termination. If the DUT's port is specified as capable of driving the load, the transmission line between the driver circuit and the DUT is terminated by switching the driver circuit's I/O terminal to a predetermined voltage level with an impedance of Z. sub. If the DUT's port is not specified as being capable of driving such a termination load, the driver circuit functions like a Z-clamp circuit.

6188880, Feb 13, 2001

Jan 29, 1998

9/011004

Sergio Sanielevici - Redwood City CA

H04B 110

455296

An apparatus for reducing undesirable low-frequency distortion in a direct conversion communication receiver includes a signal generator to produce a first periodic signal and a second periodic signal. A merge circuit combines an input signal and the first periodic signal to produce a modulated signal with a polarity switched component. A frequency translation circuit converts the modulated signal into a baseband signal with a spectrum substantially equal to the modulated signal, but centered around a carrier frequency of approximately zero and including a low-frequency error component. An output modulator circuit combines the baseband signal with the second periodic signal to produce a modified baseband signal wherein the low-frequency error component is shifted to a high frequency spectrum position and the polarity switched component is eliminated. A low-pass filter subsequently removes the low-frequency error component from the modified baseband signal, resulting in a baseband output signal with reduced low-frequency distortion.