Rohit Mittal

6915076, Jul 5, 2005

May 14, 2001

09/855319

Rohit Mittal - Sunnyvale CA, US
Chris Kennedy - Milpitas CA, US

CIENA Corporation - Linthicum MS

H04B017/00

398 38, 398 27, 398 37, 398 26, 398210, 375317, 375318, 375346

An apparatus and method for detecting a signal in an optical data network is disclosed. A peak power level and an average power level are measured for an optical input to an optical detector. A threshold power level is associated with each average power level that is sufficient to distinguish a data signal form optical noise at the average power level. A signal is detected if the measured peak power level exceeds the threshold power level appropriate for the average power level. In one embodiment, a threshold value of a ratio of the peak power level to the average power level is calculated and a signal is detected if the ratio of the measured peak power level to the average power exceeds the threshold value.

6952529, Oct 4, 2005

Sep 28, 2001

09/967696

Rohit Mittal - Sunnyvale CA, US

Ciena Corporation - Linthicum MD

H04B010/08
H04B017/00

398 26, 398 25, 398 33, 398 38

An apparatus and method for measuring optical signal to noise ratio (OSNR) in a node of an optical data network is disclosed. A peak power level and an average power level are measured for an optical input to an optical detector. The OSNR is determined by selecting an OSNR having the peak power level and the average power level associated with an optical signal traversing an optical path having attenuation and optical amplifier noise.

8169387, May 1, 2012

Sep 14, 2007

11/855904

Rohit Mittal - Sunnyvale CA, US
Donato Montanari - Central, HK

IXYS Corporation - Milpitas CA

G09G 3/32

345 82

An LED driver includes an embedded non-volatile memory (NVM) capable of being programmed and storing control data for setting a variety of features of the LED driver, such as the maximum current for driving the LEDs, analog parameters such as the resistance of the internal resistor for setting the reference current for the LEDs, and the operation modes of the charge pump of the LED driver. This enables implementation of multiple LED driver product options without the need for different metallization steps during the fabrication process for the LED driver.

8548098, Oct 1, 2013

Dec 15, 2005

11/305648

Jyn-Bang Shyu - Cupertino CA, US
Robert Olah - Sunnyvale CA, US
Rohit Mittal - Sunnyvale CA, US

Intelleflex Corporation - Santa Clara CA

H04L 27/00
H03D 3/22

375324, 375329

A circuit for recovering data from an incoming data stream according to one embodiment includes a capacitor and a substantially constant current source for charging the capacitor. A subcircuit generates a signal causing the capacitor to discharge upon detecting a first type of transition in the incoming data stream, the capacitor re-charging upon being at least partially discharged. A comparator compares a voltage on a node coupled to the capacitor to a reference voltage, the comparator outputting a first signal if the voltage on the node is higher than the reference voltage and outputting a second signal if the voltage on the node is lower than the reference voltage, the first signal being associated with a first logic value, the second signal being associated with a second logic value.

20070139159, Jun 21, 2007

Dec 15, 2005

11/305652

Rohit Mittal - Sunnyvale CA, US
Robert Olah - Sunnyvale CA, US
Jyn-Bang Shyu - Cupertino CA, US

H04Q 5/22

340010100

A circuit according to one embodiment of the present invention includes a first frequency to voltage converter for storing a reference voltage based on a frequency of an incoming signal, and a second frequency to voltage converter for storing a second voltage based on the frequency of the incoming signal, the second voltage being a fraction of the reference voltage. A voltage to frequency converter creates a voltage on a node, the voltage repeatedly varying between about the reference voltage and about the second voltage. From this varying signal, a clock signal can be derived.

20080068066, Mar 20, 2008

Sep 14, 2007

11/901160

Rohit Mittal - Sunnyvale CA, US

G05F 1/10

327535

A circuit device for a high efficiency current driver for a white LED is presented. The circuit device includes a bias transistor to provide a substantially constant bias current through a bias leg. A driver transistor is connected to the bias transistor and the current in the driver transistor substantially matches the bias current. A current feedback amplifier is configured in series with the driver transistor and a feedback node has a feedback voltage representative of an output voltage. A mirroring transistor connected to the feedback node mirrors the output voltage to the bias transistor thereby allowing the output current to substantially match the bias current when an applied voltage across the driver transistor is below a saturation voltage of the driver transistor thus mitigating effects of headroom limitation in the driver transistor.

57775141, Jul 7, 1998

Sep 27, 1996

8/721910

Rohit Mittal - Milpitas CA
Carlos Alberto Laber - Los Altos CA

Micro Linear Corporation - San Jose CA

H03F 345
H03F 316

330253

An operational amplifier having an input and an output stage. The input stage includes first and second source-coupled NMOS input transistors for accepting a differential input voltage and first and second PMOS load transistors for supplying current to each input transistor. A node between the first input transistor and first load transistor is coupled to a gate of a third PMOS transistor having its source coupled to a positive supply and its drain coupled to the sources of the input transistors and to a negative supply through a first biasing transistor. The output stage includes a fourth PMOS transistor having its gate coupled to a node between the second input transistor and the second load transistor and a source coupled to the positive supply voltage. A drain of the output transistor forms an output node and is coupled to the negative supply through a second biasing transistor. To minimize the input offset voltage, a ratio of the width-to-length of the third PMOS transistor to the width-to-length of the fourth PMOS transistor equals to a ratio of a quiescent drain current in the third PMOS transistor to a quiescent drain current in the fourth PMOS transistor.

20190089110, Mar 21, 2019

Sep 15, 2017

15/705584

- Santa Clara CA, US
Rohit Mittal - Sunnyvale CA, US
Robert W. Herrick - San Jose CA, US
Jen-Chyun Chen - San Jose CA, US

H01S 3/00
H01S 3/10

In embodiments, an apparatus to predict failure of a laser is presented. The apparatus may include a memory to store a reference model of bias current change for a laser as a function of time and temperature, one or more sensors to detect: temperature, elapsed operating time and bias current of the laser, and a processor communicatively coupled to the memory and to the one or more sensors. The processor may be to calculate an actual bias current change ΔIA at a current laser temperature, and an expected bias current change ΔIE, based at least in part on the reference model and an average operating temperature, subtract ΔIE from ΔIA, and if the difference is greater than a pre-defined value a, output a signal. Related methods and non-transitory computer-readable media may also be presented.