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Reinaldo Vega

from Trenton, NJ
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Related to:
Mae Elizabeth Tanzillo, 51Cheryl M Morgano, 50Hector Vega, 61Eddie Vega, 76Wanda Vega, 59Eddie VegaKayla Vega
Connected to:
Aaron Vega, 45Adelita Vega, 47Adina S Vega, 38Adriel M Vega, 54Agusta Vega, 50Agustin Vega, 71Ailen Vega, 30Alejandro S Vega, 43Alicia S Vega, 52Ally N Vega, 55

Reinaldo Vega Phones & Addresses

  • 919 Quinton Ave, Trenton, NJ 08629
  • Cayey, PR
  • 449 E Mifflin St, Lancaster, PA 17602

Work

Company: Diversified maintenance - Trenton, NJ Apr 2010 Position: Maintenance supervisor

Education

School / High School: miguel melende muos- Cayey Municipio, PR 1996 Specialities: ged

Resumes

Resumes

Reinaldo Vega Photo 1

Loader Operator

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Work:
T & M Pallets
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Reinaldo Vega Photo 2

Reinaldo Vega

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Reinaldo Vega Photo 3

Reinaldo Vega Trenton, NJ

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Work:
diversified maintenance
Trenton, NJ
Apr 2010 to Feb 2014
Maintenance Supervisor
one source
Cayey Municipio, PR
Mar 2000 to Sep 2006
Maintenance Worker
Education:
miguel melende muos
Cayey Municipio, PR
1996 to 1996
ged

Publications

Us Patents

Vertical Resistive Memory Device With Embedded Selectors

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US Patent:
20210167128, Jun 3, 2021
Filed:
Dec 3, 2019
Appl. No.:
16/702103
Inventors:
- Armonk NY, US
Praneet Adusumilli - Somerset NJ, US
Reinaldo Vega - Mahopac NY, US
Cheng Chi - Jersey City NJ, US
International Classification:
H01L 27/24
H01L 45/00
Abstract:
A vertical resistive switching memory device is provided that includes a resistive random access memory (ReRAM) stack embedded in a material stack of alternating layers of an interlayer dielectric material and a recessed electrode material. A selector device encapsulates a portion of the ReRAM stack and is present in an undercut region that is laterally adjacent to each of the recessed electrode material layers of the material stack.

Resistive Memory With Core And Shell Oxides And Interface Dipoles

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US Patent:
20210119122, Apr 22, 2021
Filed:
Oct 16, 2019
Appl. No.:
16/655038
Inventors:
- Armonk NY, US
Jianshi Tang - Beijing, CN
Praneet Adusumilli - Somerset NJ, US
Reinaldo Vega - Mahopac NY, US
International Classification:
H01L 45/00
H01L 27/24
G11C 13/00
Abstract:
Resistive memory with core and shell oxides and interface dipoles for controlled filament formation is provided. In one aspect, a ReRAM device includes at least one ReRAM cell having a substrate; a bottom electrode disposed on the substrate; spacers formed from a low group electron negativity material disposed on the bottom electrode; a core formed from a high group electron negativity material present between the spacers; and a top electrode over and in contact with the spacers and the core, wherein a combination of the low group electron negativity material for the spacers and the high group electron negativity material for the core generates an interface dipole pointing toward the core. Methods of forming and operating a ReRAM device are also provided.

Resistive Memory With Embedded Metal Oxide Fin For Gradual Switching

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US Patent:
20200343448, Oct 29, 2020
Filed:
Apr 25, 2019
Appl. No.:
16/394305
Inventors:
- Armonk NY, US
Praneet Adusumilli - Somerset NJ, US
Jianshi Tang - Elmsford NY, US
Reinaldo Vega - Mahopac NY, US
International Classification:
H01L 45/00
H01L 27/24
Abstract:
A method is presented for enabling heat dissipation in resistive random access memory (RRAM) devices. The method includes forming a first thermal conducting layer over a bottom electrode, depositing a metal oxide liner over the first thermal conducting layer, forming a second thermal conducting layer over the metal oxide liner, recessing the second thermal conducting layer to expose the first thermal conducting layer, and forming a top electrode in direct contact with the first and second thermal conducting layers.

Paired Intercalation Cells For Drift Migration

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US Patent:
20200327941, Oct 15, 2020
Filed:
Apr 9, 2019
Appl. No.:
16/379250
Inventors:
- Armonk NY, US
Praneet Adusumilli - Somerset NJ, US
Reinaldo Vega - Mahopac NY, US
Takashi Ando - Tuckahoe NY, US
International Classification:
G11C 13/02
G11C 13/00
G11C 11/56
Abstract:
A method is presented for mitigating conductance drift in intercalation cells for neuromorphic computing. The method includes forming a first electro-chemical random access memory (ECRAM) structure over a substrate and forming a second ECRAM over the substrate, the first and second ECRAMs sharing a common contact. The common contact can be either a source contact or a drain contact. Each of the first and second ECRAMs can include a tungsten oxide layer, an electrolyte layer, and a gate contact.
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Reinaldo Vega from Trenton, NJ Get Report