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Raymond J Saccardi

from Hudson, FL
Age ~81
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Also known as:
Rosemarie A Saccardi, Rosemarie M Saccardi, Raymon J Saccardi, Ray J Saccardi, Rosemane Saccardi, Rosemari Saccardi
Phone and address:
13819 Greyhawk Ct, Port Richey, FL 34669
(727) 869-7794
Related to:
Kathryn Williams, 45Dana J Blakley, 58Thomas Leggs, 73Susan F Williams, 75Curtis Williams, 62Reginald Pope, 55
Connected to:
Marc A Saccarelli, 65Marisa R Saccardo, 30Gary L Saccaro, 69Matthew Saccaro, 47Michael Saccaro, 56Natalie R Saccary, 53Tierney E Saccavino, 66Cary T Saccente, 75Donald D Saccente, 90Elizabeth Saccente, 31

Raymond Saccardi Phones & Addresses

  • 13819 Greyhawk Ct, Hudson, FL 34669 (727) 869-7794
  • 16108 Malcolm Dr, Laurel, MD 20707 (410) 792-9940
  • 104 Surfview Dr, Palm Coast, FL 32137 (386) 446-8996 (904) 446-8996
  • 104 Surfview Dr #1401, Palm Coast, FL 32137 (386) 446-8996
  • Lula, MS
  • Flagler Beach, FL
  • Pace, FL

Work

Position: Consultant

Education

Degree: Master of Science, Masters School / High School: University of Arizona 1965 to 1967 Specialities: Electronics Engineering

Skills

Product Management • Embedded Systems • Testing • Integration • System Architecture

Industries

Computer Hardware

Resumes

Resumes

Raymond Saccardi Photo 1

Consultant

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Location:
104 Surfview Dr, Palm Coast, FL 32137
Industry:
Computer Hardware
Work:

Consultant
Washington Dc Area Mar 1967 - Dec 1999
Dod
Education:
University of Arizona 1965 - 1967
Master of Science, Masters, Electronics Engineering Manhattan College 1961 - 1965
Bachelors, Bachelor of Science, Electronics Engineering, Electronics
Skills:
Product Management
Embedded Systems
Testing
Integration
System Architecture

Publications

Us Patents

Reconfigurable Pipelined Processor

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US Patent:
48581135, Aug 15, 1989
Filed:
Apr 10, 1987
Appl. No.:
7/038382
Inventors:
Raymond J. Saccardi - Laurel MD
Assignee:
The United States of America as represented by the Director of the
National Security Agency - Washington DC
International Classification:
G06F 700
US Classification:
364200
Abstract:
The reconfigurable pipelined processor includes a plurality of memory devices and arithmetic units interconnected by cross bars for transferring raw and processed data therebetween. A counter is connected with the cross bar to provide a source of addresses for the memory devices. At least one variable tick delay device is connected with each memory and arithmetic unit to variably control the input and output operations thereof to selectively delay the memory devices and arithmetic units to align the data for processing in a selected sequence.
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Raymond J Saccardi from Hudson, FL, age ~81 Get Report