Paul Mannas Phones & Addresses
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2920 N Sky Post Rd, Tucson, AZ 85749
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3909 Ridge Rock Dr, Plano, TX 75074 (972) 578-0116
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801 Legacy Dr #323, Plano, TX 75023 (972) 527-6031
Publications
Us Patents
Edge Recognition Based High Voltage Pseudo Layer Verification Methodology For Mix Signal Design Layout
View pageUS Patent:
20070033556, Feb 8, 2007
Filed:
Aug 8, 2005
Appl. No.:
11/199337
Inventors:
Lily Springer - Dallas TX, US
Haim Horovitz - Los Altos CA, US
Robert Shaw - Nashua NH, US
Sameer Pendharkar - Allen TX, US
Wen-Hwa Chu - Plano TX, US
Paul Mannas - Plano TX, US
Haim Horovitz - Los Altos CA, US
Robert Shaw - Nashua NH, US
Sameer Pendharkar - Allen TX, US
Wen-Hwa Chu - Plano TX, US
Paul Mannas - Plano TX, US
International Classification:
G06F 17/50
US Classification:
716005000
Abstract:
Validation of at least some of a proposed semiconductor design layout is disclosed. According to one or more aspects of the present invention, a first voltage dependent design rule is applied to an edge of an area of the layout if the edge is not covered by a pseudo layer. A second voltage dependent design rule is, on the other hand, applied to the edge of the area if the edge is covered by the pseudo layer.