Nathan Tr Zommer

6642551, Nov 4, 2003

Aug 23, 2001

09/938272

Nathan Zommer - Los Altos CA

IXYS Corporation - Santa Clara CA

H01L 29423

257127, 257315, 257488, 257630, 257638

A power integrated circuit device with multiple guard rings and field plates overlying regions between each of the guard rings. Each of the field plates form overlying a dielectric layer also between each of the guard rings. Multiple field plates can exist between each of such guard rings. At least one field plate couples to a main junction region, and another field plate couples to a peripheral region, typically a scribe line. The present power device structure with multiple guard rings and field plates provides a resulting guard ring structure which allows for such device to achieve higher voltage applications.

6683344, Jan 27, 2004

Sep 6, 2002

10/237561

Vladimir Tsukanov - Mountain View CA
Nathan Zommer - Los Altos CA

IXYS Corporation - Santa Clara CA

H01L 2978

257328, 257329, 257401

A power semiconductor device includes a substrate having an upper surface and a lower surface. A source region of first conductivity is formed within a well region of second conductivity. The source region is provided proximate to the upper surface of the substrate. The well region has a non-polygon design. A gate electrode overlies the upper surface of the substrate. A drain electrode is provided proximate to the lower surface of the substrate.

6710405, Mar 23, 2004

Jan 17, 2001

09/764545

Nathan Zommer - Los Altos CA
Vladimir Tsukanov - Mountain View CA

Ixys Corporation - Santa Clara CA

H01L 2976

257341, 257202, 257401

An active area of a power device comprises active cells having designs that vary depending on where they are located in the active area. Design variations include structural variations and variations in the material used to produce the cells.

6727527, Apr 27, 2004

Jul 17, 2000

09/617214

Nathan Zommer - Los Altos CA

IXYS Corporation - Santa Clara CA

H01L 2974

257129, 257171, 438545

A power device includes a semiconductor substrate of first conductivity type. The semiconductor substrate includes a front-side surface, a backside surface, and a scribe region. The substrate has a first well of second conductivity type whereon an active cell is defined. The first well has a first impurity type of a first mobility. A continuous diffusion region of second conductivity type extends from the front-side surface to the backside surface. The continuous diffusion region includes a second impurity type of a second mobility that has been diffused vertically into the substrate from a selected location of the backside surface. The second mobility is higher than the first mobility. A lower portion of the continuous diffusion region corresponds to the selected location of the continuous diffusion region.

6936908, Aug 30, 2005

Mar 13, 2002

10/099927

Ulrich Kelberlau - Lampertheim, DE
Peter Ingram - Hemsbach, DE
Nathan Zommer - Los Altos CA, US

IXYS Corporation - Santa Clara CA

H01L029/00

257502, 257504

A power device includes a gate electrode, a source electrode, and a drain electrode provided within an active region of a semiconductor substrate of first conductivity type. A vertical diffusion region of second conductivity is provided at a periphery the active region. The vertical diffusion region extends continuously from a top surface of the substrate to a bottom surface of the substrate. The vertical diffusion region includes an upper portion having a first depth and a lower portion having a second depth that is substantially greater than the first depth.

7005734, Feb 28, 2006

May 5, 2003

10/430818

Kang Rim Choi - Cupertino CA, US
Nathan Zommer - Los Altos CA, US

IXYS Corporation - Santa Clara CA

H01L 23/02

257686, 257688

A power device includes a semiconductor die having an upper surface and a lower surface. One or more terminals are coupled to the die. A first substrate is bonded to the upper surface of the die. The first substrate is configured to provide a first heat dissipation path. A second substrate is bonded to the lower surface of the die. The second substrate is configured to provide a second heat dissipation path.

7063975, Jun 20, 2006

Oct 3, 2003

10/678479

Vladimir Tsukanov - Sunnyvale CA, US
Nathan Zommer - Los Altos CA, US

IXYS Corporation - Santa Clara CA

H01L 21/336

435270, 257341

A power semiconductor device includes a substrate having an upper surface and a lower surface. The substrate has a trench. First and second doped regions are provided proximate the upper surface of the substrate. A first source region is provided within the first doped region. A second source region is provided within the second doped region. A gate is provided between the first and second source regions. The gate includes a first portion extending downward into the trench. A depth of the trench is no more than a depth of the first doped region.

7071537, Jul 4, 2006

May 5, 2003

10/430569

Ulrich Kelberlau - Lampertheim, DE
Nathan Zommer - Los Altos CA, US

IXYS Corporation - Santa Clara CA

H01L 29/861

257603, 257481

A power device includes a substrate assembly including an upper surface and a lower surface. The substrate assembly includes a first layer and a second layer. The first layer overlies the second layer and has different conductivity than the second layer. A first electrode is provided proximate the upper surface. A second electrode is provided proximate the upper surface and is spaced apart from the first electrode. The second layer is configured to provide a current path between the first and second electrodes.