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Mirko D Vojnovic

from Campbell, CA
Age ~64
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Also known as:
Mirko Dusan Vojnovic, Dusan Vojnovic, Mirko Dusan C
Related to:
Vesna VojnovicVerica Golubovic, 59Hilos VojnovicDragoljub Drago Golubovich, 91Theodora I Vojnovic, 27N GolubovichDonald W Johnson, 68Milos Jankovic, 64
Connected to:
Michael A Vojnovich, 65Mira Vojnovic, 82Romina Vojnovski, 43Christopher J Vojsak, 42Catherine E Vojslavek, 39Timothy E Vojslavek, 61Stefan F Vojt, 43Ernst G Vojta, 46Irene M Vojta, 64Norman Vojta, 85

Mirko Vojnovic Phones & Addresses

  • Campbell, CA
  • 2335 Menzel Pl, Santa Clara, CA 95050
  • 1301 David St APT 217, San Mateo, CA 94403
  • San Jose, CA
  • Van Nuys, CA

Resumes

Resumes

Mirko Vojnovic Photo 1

Mv Consulting

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Location:
Santa Clara, CA
Industry:
Broadcast Media
Work:
Mv Consulting
Self Employed Msee Consultant and Entrepreneur
Pixel Instruments Corp. 2006 - 2015
President
Pixel Instruments Corp. 2003 - 2006
Director of Engineering
C-Cube Microsystems Lsi Logic Corp 1997 - 2003
Staff System Engineer
C-Cor 1996 - 1997
Senior System Design Engineer
Education:
University of Belgrade
Masters, Electronics Engineering
Skills:
Signal Integrity
Design For Manufacturing
Phase Locked Loop
Mpeg2
Reading People
Analog Circuit Design
Mirko Vojnovic Photo 2

Director Of Engineer

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Location:
Santa Clara, CA
Industry:
Computer Software
Work:
Pixel
Director of Engineer
Education:
University of Belgrade 1980 - 1986

Business Records

Name / Title
Company / Classification
Phones & Addresses
Mirko Vojnovic
President
Pixel Instruments Corp.
Design
160 Albright Way, Los Gatos, CA 95032
(408) 871-1975, (408) 871-1976

Publications

Us Patents

Apparatus And Method For Maintaining Synchronization Of Multiple Delayed Signals

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US Patent:
6392707, May 21, 2002
Filed:
Jul 28, 2000
Appl. No.:
09/627618
Inventors:
J. Carl Cooper - Monte Sereno CA
Howard Loveless - Ben Lomond CA
David Wallen - San Francisco CA
Mirko Vojnovic - Santa Clara CA
Assignee:
Pixel Instruments Corp. - Los Gatos CA
International Classification:
H04N 9475
US Classification:
348515, 348512
Abstract:
This invention is a method and apparatus for delaying video type signals along with one or more secondary signals having a timing relationship to the video type signal. The delay maintains the timing relationship between the video type signal nd secondary signals. Operation to mute or otherwise modify the secondary signals upon the loss or corruption of the video type signal is shown. The selection of one of a plurality of reference signal candidates is shown along with the use of the input signal to provide a fixed delay.

Apparatus And Method For Processing Television Signals

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US Patent:
6469741, Oct 22, 2002
Filed:
May 2, 2001
Appl. No.:
09/848582
Inventors:
J. Carl Cooper - Monte Sereno CA
Howard Loveless - Ben Lomond CA
David Wallen - San Francisco CA
Mirko Vojnovic - Santa Clara CA
Assignee:
Pixel Instruments Corp. - Los Gatos CA
International Classification:
H04N 701
US Classification:
348441, 348571
Abstract:
This invention is an apparatus and method for processing television signals and in particular high quality video type signals in analog or digital form. The preferred embodiments utilizes digital storage along with oversampling, interpolation and various filtering in recursive and nonrecursive form to provide fixed or variably delayed output video signals wherein the artifacts and distortion of the video is kept to low levels.

Method And System For Correcting Quantization Loss During Analog To Digital To Analog Signal Conversion

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US Patent:
6633245, Oct 14, 2003
Filed:
Dec 12, 2002
Appl. No.:
10/318656
Inventors:
Mirko Vojnovic - Santa Clara CA
Assignee:
LSI Logic Corporation - Milpitas CA
International Classification:
H03M 200
US Classification:
341110, 341118, 341120, 341144, 341155
Abstract:
A method and system for correcting quantization loss of a signal during analog to digital to analog signal conversion, wherein the quantization loss is a function of (sin x)/x, is disclosed. The system and method of the present invention includes utilizing a continuous function polynomial to represent a (sin x)/x function, and applying an inverse function of the continuous function polynomial to the signal to provide a correction for the quantization loss.

Apparatus And Method For Digital Processing Of Analog Television Signals

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US Patent:
6989869, Jan 24, 2006
Filed:
Jul 24, 2002
Appl. No.:
10/205648
Inventors:
J. Carl Cooper - Monte Sereno CA, US
Howard Loveless - Ben Lomond CA, US
David Wallen - San Francisco CA, US
Mirko Vojnovic - Santa Clara CA, US
Assignee:
Pixel Instruments Corp. - Los Gatos CA
International Classification:
H04N 7/01
H04N 11/20
US Classification:
348441, 347571
Abstract:
This invention is an apparatus and method for digital processing of television like signals and in particular the use of oversampling and interpolation to achieve improved resolution of the digital version of such signals as compared to a digital version obtained by the use of simple A/D conversion or processing at the desired sample rate. The preferred embodiment utilizes oversampling, interpolation and various filtering in recursive and nonrecursive form to provide output video signals wherein the artifacts and distortion of the video are kept to low levels.

Low Power Memory Controller With Leaded Double Data Rate Dram Package Arranged On A Two Layer Printed Circuit Board

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US Patent:
7409572, Aug 5, 2008
Filed:
Dec 5, 2003
Appl. No.:
10/728492
Inventors:
Eric Hung - San Jose CA, US
Geeta K. Desai - Saratoga CA, US
Vijendra Kuroodi - Cupertino CA, US
Alexander Miretsky - Mountain View CA, US
Mirko Vojnovic - Santa Clara CA, US
Assignee:
LSI Corporation - Milpitas CA
International Classification:
G06F 1/00
G06F 1/04
G06F 1/12
US Classification:
713500, 713400, 713600
Abstract:
An integrated circuit is provided that includes an execution engine and a memory controller. The execution engine is clocked at a first rate and the memory controller is clocked at a second rate that is less than the first rate. Pins on the integrated circuit can transfer data to and from the integrated circuit on both the rising and falling edges of a second clock transitioning at the second clock rate. The integrated circuit is preferably packaged using a lead frame and wire bonds extending from pads on the integrated circuit to corresponding leads. The leads are secured to trace conductors on a surface of a printed circuit board. The board contains no more than two conductive layers separated by a dielectric layer. Thus, an overall electronic system is formed having a board with no more than two conductive layers, an execution engine that receives a first clock signal, a memory controller which receives a second clock signal, and a memory device that sends data to and from the memory controller at twice the rate of the second clock signal. Using a throttled second clock signal allows for less expensive packaging and mounting of packaged integrated circuits on a less expensive PCB, while still maintaining use of a DDR DRAM transfer mechanism.

Low Power Memory Controller With Leaded Double Data Rate Dram Package On A Two Layer Printed Circuit Board

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US Patent:
7657774, Feb 2, 2010
Filed:
Jun 16, 2008
Appl. No.:
12/140144
Inventors:
Eric Hung - San Jose CA, US
Geeta K. Desai - Saratoga CA, US
Vijendra Kuroodi - Cupertino CA, US
Alexander Miretsky - Mountain View CA, US
Mirko Vojnovic - Santa Clara CA, US
Assignee:
LSI Logic Corporation - Milpitas CA
International Classification:
G06F 1/00
G06F 1/04
G06F 12/00
H05K 1/00
US Classification:
713500, 713322, 713600, 711105, 361748
Abstract:
An integrated circuit is provided that includes an execution engine and a memory controller. The execution engine is clocked at a first rate and the memory controller is clocked at a second rate that is less than the first rate. Pins on the integrated circuit can transfer data to and from the integrated circuit on both the rising and falling edges of a second clock transitioning at the second clock rate. The integrated circuit is preferably packaged using a lead frame and wire bonds extending from pads on the integrated circuit to corresponding leads. The leads are secured to trace conductors on a surface of a printed circuit board. The board contains no more than two conductive layers separated by a dielectric layer. Thus, an overall electronic system is formed having a board with no more than two conductive layers, an execution engine that receives a first clock signal, a memory controller which receives a second clock signal, and a memory device that sends data to and from the memory controller at twice the rate of the second clock signal. Using a throttled second clock signal allows for less expensive packaging and mounting of packaged integrated circuits on a less expensive PCB, while still maintaining use of a DDR DRAM transfer mechanism.

Apparatus And Method For Digital Processing Of Analog Television Signals

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US Patent:
8072539, Dec 6, 2011
Filed:
Oct 21, 2005
Appl. No.:
11/256502
Inventors:
J. Carl Cooper - Incline Village NV, US
Howard Loveless - Ben Lomond CA, US
David Wallen - San Francisco CA, US
Mirko Vojnovic - Santa Clara CA, US
International Classification:
H04N 7/01
H04N 11/20
US Classification:
348441, 348571
Abstract:
This invention is an apparatus and method for digital processing of television like signals and in particular the use of oversampling and interpolation to achieve improved resolution of the digital version of such signals as compared to a digital version obtained by the use of simple A/D conversion or processing at the desired sample rate. The preferred embodiment utilizes oversampling, interpolation and various filtering in recursive and nonrecursive form to provide output video signals wherein the artifacts and distortion of the video are kept to low levels.

Method, System, And Program Product For Eliminating Error Contribution From Production Switchers With Internal Dves

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US Patent:
8330859, Dec 11, 2012
Filed:
Feb 22, 2008
Appl. No.:
12/036181
Inventors:
J. Carl Cooper - Incline Village NV, US
Mirko Vojnovic - Santa Clara CA, US
Maynard Grimm - Onalaska WA, US
Christopher Smith - Simsbury CT, US
Assignee:
Pixel Instruments Corporation - Los Gatos CA
International Classification:
H04N 5/073
H04N 9/475
US Classification:
348515, 348512, 348518, 348578, 348598, 3484231
Abstract:
Measurement of the relative timing between images and associated information, for example video and audio. Image mutual event characteristics are recognized in the images and associated mutual event characteristics are recognized in the associated information. The image mutual events and associated mutual events are compared to determine their occurrences, one relative to the other as a measure of relative timing. Particular operation with audio and video signals is described.
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Mirko D Vojnovic from Campbell, CA, age ~64 Get Report