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Mario Renzullo Phones & Addresses

  • Yonkers, NY

Resumes

Resumes

Mario Renzullo Photo 1

Process Integration Engineer

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Location:
New York, NY
Industry:
Nanotechnology
Work:
Hypres
Process Integration Engineer

Endomedix, Inc. May 2015 - Feb 2016
Engineer

Ibm Jul 2013 - Apr 2015
Process Engineer

Johnson & Johnson Apr 2010 - Sep 2010
Chemist Co-Op

Drexel University Jun 2009 - Aug 2009
Polymer Scientist Co-Op
Education:
Freecodecamp 2016 - 2017
Politecnico Di Milano 2011 - 2012
Master of Science, Masters, Engineering, Nanotechnology
Drexel University 2007 - 2012
Master of Science, Masters, Bachelors, Bachelor of Science, Chemical Engineering
Skills:
Process Engineering
Chemical Engineering
Medical Devices
Minitab
Biomaterials
Biomedical Engineering
Six Sigma
Validation
Biotechnology
Fda
Process Simulation
V&V
Spc
R&D
Design of Experiments
Matlab
Languages:
Italian
Certifications:
Engineer-In-Training
License 43931
Mario Renzullo Photo 2

Mario Renzullo

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Publications

Us Patents

System And Method For Superconducting Multi-Chip Module

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US Patent:
20210408355, Dec 30, 2021
Filed:
Sep 13, 2021
Appl. No.:
17/472821
Inventors:
- Elmsford NY, US
Denis Amparo - White Plains, PH
Oleksandr Chernyashevskyy - White Plains NY, US
Oleg Mukhanov - Putnam Valley NY, US
Mario Renzullo - Yonkers NY, US
Igor Vernik - Yorktown Heights NY, US
John Vivalda - Poughkeepsie NY, US
Jason Walter - Trumbull CT, US
International Classification:
H01L 39/04
H01L 23/00
H01L 39/22
H01L 39/24
Abstract:
A method for bonding two superconducting integrated circuits (“chips”), such that the bonds electrically interconnect the chips. A plurality of indium-coated metallic posts may be deposited on each chip. The indium bumps are aligned and compressed with moderate pressure at a temperature at which the indium is deformable but not molten, forming fully superconducting connections between the two chips when the indium is cooled down to the superconducting state. An anti-diffusion layer may be applied below the indium bumps to block reaction with underlying layers. The method is scalable to a large number of small contacts on the wafer scale, and may be used to manufacture a multi-chip module comprising a plurality of chips on a common carrier. Superconducting classical and quantum computers and superconducting sensor arrays may be packaged.

System And Method For Superconducting Multi-Chip Module

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US Patent:
20200119251, Apr 16, 2020
Filed:
Oct 11, 2019
Appl. No.:
16/599985
Inventors:
- Elmsford NY, US
Denis Amparo - White Plains, PH
Oleksandr Chernyashevskyy - White Plains NY, US
Oleg Mukhanov - Putnam Valley NY, US
Mario Renzullo - Yonkers NY, US
Igor Vernik - Yorktown Heights NY, US
John Vivalda - Poughkeepsie NY, US
Jason Walter - Trumbull CT, US
International Classification:
H01L 39/04
H01L 23/00
H01L 39/22
H01L 39/24
Abstract:
A method for bonding two superconducting integrated circuits (“chips”), such that the bonds electrically interconnect the chips. A plurality of indium-coated metallic posts may be deposited on each chip. The indium bumps are aligned and compressed with moderate pressure at a temperature at which the indium is deformable but not molten, forming fully superconducting connections between the two chips when the indium is cooled down to the superconducting state. An anti-diffusion layer may be applied below the indium bumps to block reaction with underlying layers. The method is scalable to a large number of small contacts on the wafer scale, and may be used to manufacture a multi-chip module comprising a plurality of chips on a common carrier. Superconducting classical and quantum computers and superconducting sensor arrays may be packaged.
Mario V Renzullo from Yonkers, NY, age ~35 Get Report