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Maria J Anc

from Groveland, MA
Age ~72

Maria Anc Phones & Addresses

  • 6 Byfield Rd, Groveland, MA 01834 (978) 374-1047
  • 55 Foley Rd, Marlborough, MA 01752 (508) 460-1577
  • Waltham, MA
  • Attleboro, MA

Work

Position: Administration/Managerial

Resumes

Resumes

Maria Anc Photo 1

Research Professional

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Position:
Principal Scientist at Osram Sylvania
Location:
Greater Boston Area
Industry:
Research
Work:
Osram Sylvania since 2007
Principal Scientist

QD Vision, Inc. Sep 2005 - Jul 2007
Director of Government Research Programs

Axcelis Technologies 2001 - 2004
Staff Scientist
Education:
Warsaw University of Technology
PhD, Solid State Electronics
Maria Anc Photo 2

Maria Anc

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Publications

Us Patents

Low Defect Density, Thin-Layer, Soi Substrates

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US Patent:
6593173, Jul 15, 2003
Filed:
Nov 28, 2000
Appl. No.:
09/723801
Inventors:
Maria J. Anc - Marlborough MA
Robert P. Dolan - Hudson NH
Assignee:
Ibis Technology Corporation - Danvers MA
International Classification:
H01L 2100
US Classification:
438149, 438407, 438423, 438480, 438766
Abstract:
Methods of producing buried insulating layers in semiconductor substrates are disclosed whereby a dose of selected ions is implanted into a substrate to form a buried precursor layer below an upper layer of the substrate, followed by oxidation of the substrate in an atmosphere having a selected oxygen concentration to form an oxide surface layer. The oxidation is performed at a temperature and for a time duration such that the formation of the oxide layer causes the injection of a controlled number of atoms of the substrate from a region proximate to an interface between the newly formed oxide layer and the substrate into the upper regions of the substrate to reduce strain. A high temperature annealing step is then performed to produce the insulating layer within the precursor layer.

Implantation Process Using Substoichiometric, Oxygen Doses At Different Energies

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US Patent:
6794264, Sep 21, 2004
Filed:
Apr 30, 2002
Appl. No.:
10/135683
Inventors:
Robert P. Dolan - Hudson NH
Maria J. Anc - Marlborough MA
Micahel L. Alles - Beverly MA
Assignee:
Ibis Technology Corporation - Danvers MA
International Classification:
H01L 2176
US Classification:
438407, 438480, 438479
Abstract:
The present invention provides a method for creation of high quality semiconductor-on-insulator structures, e. g. , silicon-on-insulator structures, using implantation of sub-stoichiometric doses of oxygen at multiple energies. The method employs sequential steps of ion implantation and high temperature annealing to produce structures with a top silicon layer having a thickness ranging from 10-250 nm and a buried oxide layer having a thickness 30-300 nm. The buried oxide layer has a breakdown field greater than 5 MV/cm. Further, the density of silicon inclusions in the BOX region is less than 2Ã10 cm. The process of the invention can be used to create an entire SOI wafer, or be used to create patterned SOI, regions where SOI regions are integrated with non-SOI regions.

Removing Byproducts Of Physical And Chemical Reactions In An Ion Implanter

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US Patent:
7173260, Feb 6, 2007
Filed:
Dec 22, 2004
Appl. No.:
11/022060
Inventors:
Maria J. Anc - Groveland MA, US
Dale K. Stone - Lynnfield MA, US
Christopher T. Reddy - Groveland MA, US
Assignee:
Axcelis Technologies, Inc. - Beverly MA
International Classification:
G21G 5/00
H01L 21/76
US Classification:
2504921, 438407, 438423
Abstract:
An ion implanter having a source, a workpiece support and a transport system for delivering ions from the source to an ion implantation chamber that contains the workpiece support. The implanter includes one or more removable inserts mounted to an interior of either the transport system or the ion implantation chamber for collecting material entering either the transport system or the ion implantation chamber due to collisions between ions and the workpiece within the ion implantation chamber during ion processing of the workpiece. A temperature control coupled to the one or more removable inserts for maintaining the temperature of the insert at a controlled temperature to promote formation of a film on said insert during ion treatment due to collisions between ions and said workpiece.

Tubular Blue Led Lamp With Remote Phosphor

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US Patent:
7618157, Nov 17, 2009
Filed:
Jun 25, 2008
Appl. No.:
12/145895
Inventors:
Miguel Galvez - Danvers MA, US
Maria Anc - Groveland MA, US
Richard Speer - Concord MA, US
William A. George - Lynn MA, US
Assignee:
Osram Sylvania Inc. - Danvers MA
International Classification:
F21V 29/00
US Classification:
362294, 362 84, 362218, 36231102, 36231104, 36231111
Abstract:
A lamp includes a linearly extending heat sink, blue-light-emitting LEDs mounted on the heat sink, and a light emitting cover mounted on the heat sink in line with the LEDs, a first portion of the cover opposite the LEDs including a phosphor that is excited by the LEDs to emit white light. The cover may be a tube with the LEDs outside the tube, a portion of the tube nearest the LEDs being transparent and receiving light from the LEDs. The tube may include reflectors that are attached to an exterior surface of the tube to hold the tube on the heat sink. Alternatively, the cover may enclose the LEDs on the heat sink, where a portion of the cover has an interior surface that reflects light from the LEDs to the first portion. The lamp may include electrical connections that allow for multiple lamps to be connected in series.

Led Device Utilizing Quantum Dots

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US Patent:
8455898, Jun 4, 2013
Filed:
Mar 28, 2011
Appl. No.:
13/073153
Inventors:
Maria J. Anc - Groveland MA, US
Assignee:
Osram Sylvania Inc. - Danvers MA
International Classification:
H01L 33/00
US Classification:
257 98, 257E33059
Abstract:
There is herein described a LED lighting device utilizing quantum dots in layers on top of an LED chip. The quantum dots layers and the LED chip are arranged with gradient refractive indices, so that the refractive index of each layer is preferably less than the refractive index of the immediately underlying layer or chip. The quantum dots with emission peaks at longer wavelengths are preferably arranged in lower layers closer to the LED chip; while the quantum dots with emission peaks at shorter wavelengths are arranged in higher layers farther from the LED chip.

Composition Including Material, Methods Of Depositing Material, Articles Including Same And Systems For Depositing Material

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US Patent:
8470617, Jun 25, 2013
Filed:
Oct 6, 2008
Appl. No.:
12/287143
Inventors:
Seth Coe-Sullivan - Belmont MA, US
Maria J. Anc - Groveland MA, US
LeeAnn Kim - Dover MA, US
John E. Ritter - Westford MA, US
Marshall Cox - North Haven CT, US
Craig Breen - Somerville MA, US
Vladimir Bulovic - Lexington MA, US
Ioannis Kymissis - New York NY, US
Peter T. Kazlas - Sudbury MA, US
Assignee:
QD Vision, Inc. - Lexington MA
International Classification:
H01L 21/00
US Classification:
438 22, 438669, 257288
Abstract:
Methods for depositing nanomaterial onto a substrate are disclosed. Also disclosed are compositions useful for depositing nanomaterial, methods of making devices including nanomaterials, and a system and devices useful for depositing nanomaterials.

Led Light Engine And Method Of Manufacture Thereof

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US Patent:
8618570, Dec 31, 2013
Filed:
Apr 28, 2010
Appl. No.:
13/318629
Inventors:
Miguel Galvez - Danvers MA, US
Maria Anc - Groveland MA, US
Assignee:
Osram Sylvania Inc. - Danvers MA
International Classification:
H01L 33/00
US Classification:
257 98, 257100, 257E33059, 438 27, 438 29
Abstract:
A light emitting diode (LED) light engine includes a solid transparent dome mounted on one or more LED dies to form a base module, a flexible sheath having embedded therein a phosphor that converts light of a first wavelength range to light of a second wavelength range, the sheath being attached to the base module so that the sheath conforms to a light emitting surface of the dome. The sheath emits light of the second wavelength range when the LED is emitting light of the first wavelength range. Further sheaths may be formed each with different phosphors or phosphor blends, and one of the sheaths may be selected to cover the base module depending on the color of light to be produced by the light engine.

Implantation Process Using Sub-Stoichiometric, Oxygen Doses At Different Energies

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US Patent:
20020081824, Jun 27, 2002
Filed:
Dec 21, 2000
Appl. No.:
09/748526
Inventors:
Robert Dolan - Hudson NH, US
Bernhardt Cordts - Ipswich MA, US
Maria Anc - Marlborough MA, US
Michael Alles - Beverly MA, US
Assignee:
Ibis Technology, Inc.
International Classification:
H01L021/20
C30B001/00
H01L021/36
H01L021/425
US Classification:
438/480000
Abstract:
The present invention provides a method for creation of high quality semiconductor-on-insulator structures, e.g., silicon-on-insulator structures, using implantation of sub-stoichiometric doses of oxygen at multiple energies. The method employs sequential steps of ion implantation and high temperature annealing to produce structures with a top silicon layer having a thickness ranging from 10-250 nm and a buried oxide layer having a thickness 30-300 nm. The buried oxide layer has a breakdown field greater than 5 MV/cm. Further, the density of silicon inclusions in the BOX region is less than 2×10cm. The process of the invention can be used to create an entire SOI wafer, or be used to create patterned SOI, regions where SOI regions are integrated with non-SOI regions.
Maria J Anc from Groveland, MA, age ~72 Get Report