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Lokesh Jindal

from Sunnyvale, CA
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Connected to:
Agrim Jindal, 33Anshul Jindal, 34Apoorva Jindal, 43Arjun Jindal, 39Arpita Jindal, 37Chetan Jindal, 34Deepa Jindal, 49Krishan K Jindal, 73Mahavir Jindal, 47Pooja Jindal, 42

Lokesh Jindal Phones & Addresses

  • Sunnyvale, CA
  • San Francisco, CA
  • Madison, WI
  • Austin, TX

Work

Company: Linkedin Sep 2019 Position: Software engineer

Education

Degree: Masters School / High School: University of Wisconsin - Madison 2014 to 2016

Skills

Computer Architecture • C • C++ • Verilog • Soc • Embedded Systems • Algorithms • Cpu Design • Vlsi • Matlab • Asic • Pspice • Vhdl • Microcontrollers • Modelsim • Fpga • Soc Verification • Design For Debug • Synopsis Design Compiler • Gem5 Architecture Simulator • Low Power Design • Performance Modeling • Soc Architecture • Performance Analysis

Languages

English • Hindi • French

Ranks

Certificate: The Hardware/Software Interface

Interests

Power Modeling and Analysis • Embedded Systems • Performance Correlation • Digital Design • Hardware Software Interface • Computer Architecture • Soc Design • Low Power Design • Vlsi • Performance Modeling

Industries

Computer Hardware

Resumes

Resumes

Lokesh Jindal Photo 1

Software Engineer

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Location:
Sunnyvale, CA
Industry:
Computer Hardware
Work:
Linkedin
Software Engineer
Nvidia
Memory Architect
Oracle Microelectronics Jul 2016 - Oct 2017
Performance Modeling Engineer
University of Wisconsin-Madison Aug 31, 2014 - May 2016
Graduate Student and Teaching Assistant
Samsung Austin R&D Center May 2015 - Aug 2015
Cpu Performance Architecture Intern
Education:
University of Wisconsin - Madison 2014 - 2016
Masters Birla Institute of Technology and Science, Pilani 2008 - 2012
Bachelor of Engineering, Bachelors, Electronics Engineering Dav Public School Hamirpur (Hp)
Dav Public School Hamirpur
University of Wisconsin - Madison
Master of Science, Masters
Skills:
Computer Architecture
C
C++
Verilog
Soc
Embedded Systems
Algorithms
Cpu Design
Vlsi
Matlab
Asic
Pspice
Vhdl
Microcontrollers
Modelsim
Fpga
Soc Verification
Design For Debug
Synopsis Design Compiler
Gem5 Architecture Simulator
Low Power Design
Performance Modeling
Soc Architecture
Performance Analysis
Interests:
Power Modeling and Analysis
Embedded Systems
Performance Correlation
Digital Design
Hardware Software Interface
Computer Architecture
Soc Design
Low Power Design
Vlsi
Performance Modeling
Languages:
English
Hindi
French
Certifications:
The Hardware/Software Interface
Coursera
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Lokesh Jindal from Sunnyvale, CA Get Report