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Lin Tan

from Hayward, CA
Age ~42
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Also known as:
Tan Lin Tan, Tan Lin, Lin T An
Related to:
Yun Lan Lin, 47Ming H Lin, 74Thones TranRichard Stpierre, 43Aiqin Su, 41Marilyn Ventura, 56Chi Tran
Connected to:
Aaron B Tan, 48Amie Tan, 47Andreas S Tan, 63Angela S Tan, 51Antoine Tan, 35Arielle S Tan, 34Arjun Tan, 81Arlyn Tan, 50Armando T Tan, 71Artemus C Tan, 56

Lin Tan Phones & Addresses

  • Hayward, CA
  • Atlanta, GA
  • Elmhurst, NY
  • Emeryville, CA
  • San Francisco, CA
  • Alhambra, CA
  • El Monte, CA
  • San Jose, CA

Resumes

Resumes

Lin Tan Photo 1

Lin Tan

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Location:
United States
Lin Tan Photo 2

Lin Tan

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Location:
United States
Lin Tan Photo 3

Lin Tan

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Location:
United States
Work:
The Ohio Department of Taxation 2002 - 2012
Auditor
Lin Tan Photo 4

Lin Tan Cliffside Park, NJ

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Work:
Standard Chartered Bank (China) Co., Ltd
Shenzhen, CN
Aug 2013 to Nov 2013
Director of Customer Service
Shenzhen Neptunuscity Real Estate Investment Consulting Co., Ltd
Shenzhen, CN
May 2012 to Sep 2012
Consultant
Education:
Stevens Institute of Technology
Hoboken, NJ
Jan 2014
Master of Science in Pharmaceutical Manufacturing
Shenzhen University
Shenzhen, CN
Sep 2009 to Jul 2013
Bachelor of Science in Biological Science
Skills:
Lab Skills: Absorption Chromatography, Agarose Gel Electrophoresis, Aseptic Technique, Sterilization, Inoculation, Staining, PCR, Centrifugation, Ultrathin Sectioning, Cell Cultivation, Filtration, Recrystallization, Steam Distillation, Vacuum Distillation, Desiccation, Extraction, Biological Signals Collecting and Processing. Software: Microsoft Office:Word, PowerPoint, Excel; MiniTab, SPSS, Adobe Photoshop, Visual Basic. Language: Chinese, Cantonese (Fluent).

Business Records

Name / Title
Company / Classification
Phones & Addresses
Lin Y. Tan
Owner
Happy Joy Kitchen
Eating Place
760 10 Ave, New York, NY 10019
Lin Tan
LGT MATERIAL TECHNOLOGY LLC

Publications

Us Patents

Method For Distributed Clipping Outside Of View Volume

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US Patent:
20100271370, Oct 28, 2010
Filed:
May 19, 2010
Appl. No.:
12/783433
Inventors:
Mike M. Cai - Newark CA, US
Lin Tan - Cupertino CA, US
Frido Garritsen - Hayward CA, US
Ming Chen - San Jose CA, US
Assignee:
Vivante Corporation - Sunnyvale CA
International Classification:
G06T 15/10
US Classification:
345423
Abstract:
A distributed clipping scheme is provided, view frustum culling is distributed in several places in a graphics processing pipeline to simplify hardware implementation and improve performance. In general, many 3D objects are outside viewing frustum. In one embodiment, clipping is performed on these objects with a simple algorithm in the PA module, such as near Z clipping, trivial rejection and trivial acceptance. In one embodiment, the SE and RA modules perform the rest of clipping, such as X, Y and far Z clipping. In one embodiment, the SE module performs clipping by way of computing a initial point of rasterization. In one embodiment, the RA module performs clipping by way of conducting the rendering step of the rasterization process. This approach distributes the complexity in the graphics processing pipeline and makes the design simpler and faster, therefore design complexity, cost and performance may all be improved in hardware implementation.

Virtualized Gpu In A Virtual Machine Environment

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US Patent:
20110102443, May 5, 2011
Filed:
Dec 4, 2009
Appl. No.:
12/631662
Inventors:
Asael Dror - San Francisco CA, US
Hao Zhang - Sunnyvale CA, US
B. Anil Kumar - Saratoga CA, US
Stuart Ray Patrick - Bellevue WA, US
Neal D. Margulis - Woodside CA, US
Lin Tan - Cupertino CA, US
Pandele Stanescu - Santa Clara CA, US
Martin Amon - Palo Alto CA, US
Miriam Barbara Sedman - Palo Alto CA, US
Assignee:
Microsoft Corporation - Redmond WA
International Classification:
G06T 1/00
US Classification:
345522
Abstract:
Methods and systems are disclosed for virtualizing a graphics accelerator such as a GPU. In one embodiment, a GPU can be paravirtualized. Rather than modeling a complete hardware GPU, paravirtualization may provide for an abstracted software-only GPU that presents a software interface different from that of the underlying hardware. By providing a paravirtualized GPU, a virtual machine may enable a rich user experience with, for example, accelerated 3D rendering and multimedia, without the need for the virtual machine to be associated with a particular GPU product.

Para-Virtualized High-Performance Computing And Gdi Acceleration

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US Patent:
20130181998, Jul 18, 2013
Filed:
Jan 17, 2012
Appl. No.:
13/352121
Inventors:
Meher Prasad Malakapalli - Santa Clara CA, US
Hao Zhang - Sunnyvale CA, US
Lin Tan - Cupertino CA, US
Assignee:
Microsoft Corporation - Redmond WA
International Classification:
G06T 1/20
US Classification:
345503
Abstract:
The present invention extends to methods, systems, and computer program products for para-virtualized GPGPU computation and GDI acceleration. Some embodiments provide a compute shader to a guest application within a para-virtualized environment. A vGPU in a child partition presents compute shader DDIs for performing GPGPU computations to a guest application. A render component in a root partition receives compute shader commands from the vGPU and schedules the commands for execution at the physical GPU. Other embodiments provide GPU-accelerated GDI rendering capabilities to a guest application within a para-virtualized environment. A vGPU in a child partition provides an API for receiving GDI commands, and sends GDI commands and data to a render component in a root partition. The render component schedules the GDI commands on a 3D rendering device. The 3D rendering device executes the GDI commands at the physical GPU using a sharable GDI surface.

Para-Virtualized Domain, Hull, And Geometry Shaders

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US Patent:
20130181999, Jul 18, 2013
Filed:
Jan 13, 2012
Appl. No.:
13/350246
Inventors:
Meher Prasad Malakapalli - Santa Clara CA, US
Hao Zhang - Sunnyvale CA, US
Lin Tan - Cupertino CA, US
Meetesh Barua - Sunnyvale CA, US
Pandele Stanescu - Santa Clara CA, US
B. Anil Kumar - Saratoga CA, US
Eric K. Han - Sunnyvale CA, US
Artem Belkine - Renton WA, US
Jeroen Dirk Meijer - Sunnyvale CA, US
Winston Matthew Penfold Johnston - San Mateo CA, US
Assignee:
MICROSOFT CORPORATION - Redmond WA
International Classification:
G06T 1/20
US Classification:
345506
Abstract:
The present invention extends to methods, systems, and computer program products for providing domain, hull, and geometry shaders in a para-virtualized environment. As such, a guest application executing in a child partition is enabled use a programmable GPU pipeline of a physical GPU. A vGPU (executing in the child partition) is presented to the guest application. The vGPU exposes DDIs of a rendering framework. The DDIs enable the guest application to send graphics commands to the vGPU, including commands for utilizing a domain shader, a hull shader, and/or a geometric shader at a physical GPU. A render component (executing within the root partition) receives physical GPU-specific commands from the vGPU, including commands for using the domain shader, the hull shader, and/or the geometric shader. The render component schedules the physical GPU-specific command(s) for execution at the physical GPU.

Method For Distributed Clipping Outside Of View Volume

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US Patent:
7746355, Jun 29, 2010
Filed:
Jan 24, 2007
Appl. No.:
11/657966
Inventors:
Mike Cai - Newark CA, US
Lin Tan - Cupertino CA, US
Frido Garritsen - Hayward CA, US
Ming Chen - San Jose CA, US
Assignee:
Vivante Corporation - Sunnyvale CA
International Classification:
G09G 5/00
US Classification:
345620, 345623, 345624
Abstract:
A distributed clipping scheme is provided, view frustum culling is distributed in several places in a graphics processing pipeline to simplify hardware implementation and improve performance. In general, many 3D objects are outside viewing frustum. In one embodiment, clipping is performed on these objects with a simple algorithm in the PA module, such as near Z clipping, trivial rejection and trivial acceptance. In one embodiment, the SE and RA modules perform the rest of clipping, such as X, Y and far Z clipping. In one embodiment, the SE module performs clipping by way of computing a initial point of rasterization. In one embodiment, the RA module performs clipping by way of conducting the rendering step of the rasterization process. This approach distributes the complexity in the graphics processing pipeline and makes the design simpler and faster, therefore design complexity, cost and performance may all be improved in hardware implementation.

Virtualized Gpu In A Virtual Machine Environment

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US Patent:
20170323418, Nov 9, 2017
Filed:
Jun 5, 2017
Appl. No.:
15/614466
Inventors:
- Redmond WA, US
Hao ZHANG - Sunnyvale CA, US
B. Anil KUMAR - Saratoga CA, US
Stuart Ray PATRICK - Bellevue WA, US
Neal D. MARGULIS - Woodside CA, US
Lin TAN - Cupertino CA, US
Pandele STANESCU - Santa Clara CA, US
Martin AMON - Palo Alto CA, US
Miriam Barbara SEDMAN - Palo Alto CA, US
International Classification:
G06T 1/20
G06F 9/455
G06F 9/455
Abstract:
Techniques are described for providing graphics functionality. In a first partition, a software interface comprising graphics capabilities that are abstracted from capabilities of the graphics accelerator device is loaded. In a second partition loading, a graphics capturing and rendering process is loaded. The software interface on the first partition receives a request to render graphics. The request is based on the abstracted graphics capabilities. The graphics capturing and rendering process renders the requested graphics on the second partition. The abstracted graphics capabilities are effectuated in accordance with the capabilities of the graphics accelerator device. The capturing process executing on the second partition provides the rendered graphics to the first partition.
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Lin Tan from Hayward, CA, age ~42 Get Report