Li Ching Lin

7126428, Oct 24, 2006

Apr 5, 2005

11/100143

Li Lin - Saratoga CA, US
Arya Reza Behzad - Poway CA, US

Broadcom Corporation - Irvine CA

H03F 3/04

330311, 330261, 330278

A multi-stage, variable gain amplifier whose linearity is relatively insensitive to variations in gain control is disclosed. The amplifier includes a primary cascoded pair of transistors for producing a primary output current from an input voltage as a function of a primary cascode control voltage. The amplifier further includes one or more secondary cascoded pairs of transistors coupled to the primary cascoded pair of transistors for producing one or more secondary output currents from the input voltage as a function of one or more secondary cascode control voltages. The output current of the RF circuit is a sum of the primary output current and the one or more secondary output currents.

8564471, Oct 22, 2013

Dec 21, 2011

13/333058

Xiang Gao - San Jose CA, US
Chih-Wei Yao - Milpitas CA, US
Chi-Hung Lin - Fremont CA, US
Li Lin - Saratoga CA, US

Marvell International Ltd. - Hamilton

H03M 1/50

341166, 341155

Disclosed is a time-to-digital (TDC) converter comprising an analog voltage source. An analog-to-digital converter quantizes two voltage samples in response to receiving a first input signal at a first time tand a second input signal at a second time t. The first and second digital signals are combined to produce a digital signal that represents the difference (t−t).

8570887, Oct 29, 2013

Nov 11, 2010

12/944031

Thomas B. Cho - Fremont CA, US
Li Lin - Saratoga CA, US
Mao Yu - San Jose CA, US
Atul Salhotra - Sunnyvale CA, US

Marvell World Trade Ltd. - St. Michael

G01R 31/08

370252, 455208

Apparatus having corresponding methods and non-transitory computer-readable media comprise an amplifier configured to amplify signals according to a bias current, wherein the signals represent packets of data; a packet module configured to recover the packets of data from the signals amplified by the amplifier; and a control module configured to control the bias current according to one or more characteristics of the packets of data.

8571497, Oct 29, 2013

Nov 16, 2011

13/297420

Li Lin - Saratoga CA, US
Arnab Kumar Mitra - Sunnyvale CA, US
Harish Ramamurthy - Sunnyvale CA, US
Sergey Timofeev - Santa Clara CA, US
Lance Nagamine - Fremont CA, US
Brian Bosso - Santa Clara CA, US

Marvell International Ltd. - Hamilton

H01Q 11/12
H04B 1/04

4551272, 455118, 455126

A radio frequency transmitting system includes a programmable amplifier, a power amplifier, a power detector, and a calibration module. The programmable amplifier is configured to amplify an input signal to generate an amplified signal. The power amplifier is configured to output a transmit signal in response to the amplified signal. The transmit signal has a transmit power. The power detector is configured to generate a power measurement in response to the transmit power. The calibration module is configured to implement a plurality of feedback loops to adjust a gain of the programmable amplifier in response to a difference between the power measurement and a desired transmit power. The calibration module is configured to select one of the plurality of feedback loops in response to the desired transmit power.

8624673, Jan 7, 2014

Jan 11, 2012

13/348397

Jinho Park - San Jose CA, US
Yuan Lu - Sunnyvale CA, US
Li Lin - Saratoga CA, US

Marvell World Trade Ltd. - Hamilton

H03F 3/26

330267, 330264

The present disclosure describes self-biasing radio frequency circuitry. In some aspects a radio frequency (RF) signal is amplified via a circuit having a first transistor configured to source current to an output of the circuit and a second transistor configured to sink current from the output of the circuit, and another signal is provided, without active circuitry, from the output of the circuit to a gate of the first transistor effective to bias a voltage at the output of the circuit. By so doing, the output of the circuit can be biased without active circuitry which can reduce design complexity of and substrate area consumed by the circuit.

8638168, Jan 28, 2014

Jun 7, 2012

13/490901

David M. Signoff - Mountain View CA, US
Li Lin - Saratoga CA, US
Renaldi Winoto - Danville CA, US
Wayne A. Loeb - San Francisco CA, US
Shu-Hsien Liao - Sunnyvale CA, US
Ming He - Fremont CA, US

Marvell International Ltd. - Hamilton

H03F 3/68

330124R, 330295

Systems and methods for power amplification using multiple digital amplifiers are provided. A power amplifier includes a first digital amplifier configured to process a digital input signal to generate a first analog output signal. The first analog output signal is configured to have a magnitude corresponding to amplitude information of the digital input signal. The power amplifier further includes a second digital amplifier configured to process an adjusted digital input signal to generate a second analog output signal. The second analog output signal is configured to have a magnitude corresponding to amplitude information of the adjusted digital input signal. An adjustment module configured to adjust amplitude information and phase information of the digital input signal generates the adjusted digital input signal. The digital input signal is adjusted to control a relationship between the first analog output signal and the second analog output signal.

7362192, Apr 22, 2008

Nov 18, 2005

11/282342

Li Lin - Saratoga CA, US
Thomas B. Cho - Fremont CA, US

Marvell International Ltd. - Hamilton

H03B 5/12

331117FE, 331117 R, 331 36 C, 331177 V

Oscillator circuits for reducing phase noise are described in this disclosure. In one embodiment, an oscillator circuit includes a pair of cross-coupled transistors, including a first transistor and a second transistor, a first inductor in communication with a control terminal of the first transistor and an output terminal of the second transistor, a second inductor in communication with a control terminal of the second transistor and an output terminal of the first transistor, and a tank circuit in communication with the first inductor and the second inductor, where the tank circuit comprises a tank inductor and a variable capacitor.

20110285475, Nov 24, 2011

May 13, 2011

13/107729

Yuan Lu - Sunnyvale CA, US
Renaldi Winoto - Danville CA, US
Jinho Park - San Jose CA, US
Li Lin - Saratoga CA, US
Xinhua Chen - Santa Clara CA, US
Ming He - Fremont CA, US
David Signoff - Mountain View CA, US
Wayne Loeb - San Francisco CA, US

H01P 1/15

333104

Disclosed is a transmit/receive circuit arrangement wherein a transceiver circuit including a transmit/receive switch is fabricated on an integrated circuit chip. A matching network is wholly disposed off-chip relative to the integrated circuit chip. In embodiments, at least a portion of the matching network is formed off-chip and a portion of the matching network is formed on-chip.