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Leland Szewerenko Phones & Addresses

  • 4600 Seton Center Pkwy, Austin, TX 78759 (512) 241-0711
  • 4600 Seton Center Pkwy APT 104, Austin, TX 78759 (512) 241-0711
  • 4600 Seton Center Pkwy #105, Austin, TX 78759 (512) 241-0711
  • 1234 Highland Ave, Pittsburgh, PA 15206 (412) 362-1479 (412) 661-9030
  • Glenshaw, PA
  • 4600 Seton Center Pkwy APT 104, Austin, TX 78759 (412) 915-3993

Publications

Us Patents

Data Exchange System And Method For Processors

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US Patent:
6775793, Aug 10, 2004
Filed:
Dec 15, 2000
Appl. No.:
09/738241
Inventors:
Douglas Deao - Brookshire TX
Deborah Keil - Pittsburgh PA
Robert McGowan - Monroeville PA
Craig McLean - Irwin PA
Gary Swoboda - Sugar Land TX
Leland Szewerenko - Pittsburgh PA
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F 1100
US Classification:
714 29, 712227
Abstract:
A data exchange system that exchanges data between processors is provided. The system includes a host processor and a target processor. Data is exchanged by forming a data pipeline between the target processor and the host processor. The data pipeline includes a data unit on the target processor, an emulator and a device driver on the host processor. The data exchange system sends data through the data pipe line by transferring the data from a target memory on the target processor with the data unit to the emulator. The data exchange system transfers the data from the emulator to the first device driver.

System And Method For Automatically Configuring A Debug System

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US Patent:
6785850, Aug 31, 2004
Filed:
Mar 2, 2001
Appl. No.:
09/798173
Inventors:
Jonathan Dzoba - Sugarland TX
Gary L. Swoboda - Sugarland TX
Sambandam Manohar - Bangalore, IN
Kenneth E. Aron - Angleton TX
Leland J. Szewerenko - Pittsburgh PA
Paul Gingrich - Toronto, CA
Jiuling Liu - Sugarland TX
Alan L. Davis - Sugarland TX
Edmund Sim - Toronto, CA
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F 1100
US Classification:
714 46, 714 38
Abstract:
The invention relates to a software system and method for configuring a software system for interaction with a hardware system. In this method, the software system ( ) is executed on a host processor interconnected with the hardware system ( ). A database ( ) is accessed to obtain a description of a set of functional components present within the hardware system ( ). A software representation ( ) of the capabilities of each functional component is created by using the description of the set of functional components. Then, the software representation ( ) is interrogated to determine a set of operational capabilities of the hardware system ( ). The software system ( ) is then operated in a manner that is responsive to the set of operational capabilities of the hardware system ( ).

Method And System For Visual Linker

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US Patent:
6883167, Apr 19, 2005
Filed:
Jun 26, 2000
Appl. No.:
09/604112
Inventors:
Leland Szewerenko - Pittsburgh PA, US
David A. Syiek - Pittsburgh PA, US
Edward Anderson - Gibsonia PA, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F009/44
US Classification:
717162, 717163, 717164, 717165, 717166, 717167
Abstract:
The present invention provides a visual linker. The visual linker includes a link server that implements linking instructions for sections to a memory. The visual linker also includes a graphical user interface that receives said instructions and displays said sections within said memory. The visual linker also includes an application programming interface that receives said instructions and reports the results of said linking instruction and said sections within said memory. The visual linker also includes an incomplete link comprising sections not allocated to said memory. The visual linker also includes a link recipe comprising said instructions implemented by said link server.

Method And System For Far Branch And Call Instructions

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US Patent:
6928641, Aug 9, 2005
Filed:
Jun 26, 2000
Appl. No.:
09/604113
Inventors:
Leland Szewerenko - Pittsburgh PA, US
David A. Syiek - Pittsburgh PA, US
Robert Cyran - Delmont PA, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F009/44
US Classification:
717159, 717162
Abstract:
The present invention provides a method for far branch and call instructions. The present invention includes the link-time modification of object code generated by the compiler or assembler and the addition of custom generated object code to the link for the purpose of implementing far branches and calls without changing the compiler generated instructions or expanding compiler generated object code.

Multiprocessor Emulation Support Using Dynamic Linking

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US Patent:
6931636, Aug 16, 2005
Filed:
Jun 22, 2001
Appl. No.:
09/887504
Inventors:
Douglas Deao - Brookshire TX, US
Deborah Keil - Pittsburgh PA, US
Robert McGowan - Monroeville PA, US
Craig McLean - Irwin PA, US
Gary Swoboda - Sugar Land TX, US
Leland Szewerenko - Pittsburgh PA, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F009/44
US Classification:
717167, 717124, 717138
Abstract:
A method and system for dynamically linked emulation with a mix of target debuggers on a host computer wherein a debugger for each processor on the target system connects to a target interface for that kind of processor. That target interface then communicates with an emulator dynamic loader on the host computer connected to an emulator. The target interface communicates with the dynamic loader on the host computer to determine if there is support for the desired kind on the emulator. If not a target interface is loaded to the emulator and connected to the already running software on the host. A connection to this target interface software on the emulator is then provided to the host computer.

Managed Memory Component

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US Patent:
7304382, Dec 4, 2007
Filed:
May 18, 2006
Appl. No.:
11/436957
Inventors:
Ron Orris - Austin TX, US
Leland Szewerenko - Austin TX, US
Tim Roy - Driftwood TX, US
Julian Partridge - Austin TX, US
David L. Roper - Austin TX, US
Assignee:
Staktek Group L.P. - Austin TX
International Classification:
H01L 23/34
US Classification:
257723, 257777
Abstract:
The present invention provides a system and method for combining a leaded package IC and a semiconductor die using a flex circuitry to reduce footprint for the combination. A leaded IC package is disposed along the obverse side of a flex circuit. In a preferred embodiment, leads of the leaded IC package are configured to allow the lower surface of the body of the leaded IC package to contact the surface of the flex circuitry either directly or indirectly through an adhesive. A semiconductor die is connected to the reverse side of the flex circuit. In one embodiment, the semiconductor die is disposed on the reverse side of the flex while, in an alternative embodiment, the semiconductor die is disposed into a window in the flex circuit to rest directly or indirectly upon the body of the leaded IC package. Module contacts are provided in a variety of configurations. In a preferred embodiment, the leaded IC package is a flash memory and the semiconductor die is a controller.

Real-Time Data Exchange On Demand

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US Patent:
7343591, Mar 11, 2008
Filed:
Apr 4, 2003
Appl. No.:
10/406972
Inventors:
Leland J. Szewerenko - Pittsburgh PA, US
Deborah C. Keil - Pittsburgh PA, US
Craig D. McLean - Irwin PA, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G06F 9/44
G06F 11/00
G06G 9/45
US Classification:
717134, 717127, 717129, 717138, 714 27, 714 30
Abstract:
A real time data exchange on demand system for transferring real time data between a host processor and a target processor is described. The target processor includes a real time target exchange library and API library interface to a target application. The host processor includes a target server, a real time data exchange API interface to a host data exchange application and a real time data exchange dynamic link library. An interconnection data link is coupled between said real time target exchange library on said target processor and said real time data exchange dynamic link library on said host processor. The host processor includes a user interface for programming real time data exchange transfer points for data exchange into the target processor that are passed down to the target processor via the interconnection data link. The target processor has programmable triggers that are programmed by the transfer points that call an appropriate real time data exchange routine to do the data transfer.

Circuit Module Having Force Resistant Construction

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US Patent:
7417310, Aug 26, 2008
Filed:
Nov 2, 2006
Appl. No.:
11/556124
Inventors:
Leland Szewerenko - Austin TX, US
Julian Partridge - Austin TX, US
Ron Orris - Austin TX, US
Assignee:
Entorian Technologies, LP - Austin TX
International Classification:
G06K 9/00
US Classification:
257696, 382124
Abstract:
Impact resistant circuit modules are disclosed for enclosing a die having a sensor area. Preferred modules include a flexible circuit and a die coupled thereto. The flexible circuit is preferably folded over compressible material to help absorb applied forces. A gap may be provided between sides of the die and the compressible material to help prevent peeling. A metal reinforcing layer may be bonded to the back of the die. A low modulus material including a patterned gap underneath the die may be used to absorb forces. A dry film adhesive may be placed between at least part of the upper surface of the die and the flexible circuit, preferably to provide further point impact resistance and protection. High and low modulus material may be combined in ruggedizing structures. Consumer devices employing such circuit modules are also taught, as well as module construction methods.
Leland J Szewerenko from Austin, TX, age ~71 Get Report