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Kris P Dehnel

from Marble Falls, TX
Age ~90
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Related to:
Jason L Bradbury, 46Patricia Ann Mallory, 71Collin Douglas Harris, 44Connie L Dehnel, 90R P DehnelDouglas R Dehnel, 61Novella J DehnelPaul E Dehnel, 95
Connected to:
Carolyn A Dehnel, 84Denise D Dehnel, 69Gary A Dehnel, 76Keith J Dehnel, 60Michael J Dehnel, 62Wendy J Dehnel, 61Elke Dehner, 51Kevin M Dehner, 38Matthew J Dehner, 50Monica L Dehner, 54

Kris Dehnel Phones & Addresses

  • Marble Falls, TX
  • Lakeway, TX

Education

School / High School: Caltech 1977 to 1981

Skills

Semiconductors • Analog • Ic • Embedded Systems • Pcb Design • Hardware Architecture • Electrical Engineering

Industries

Electrical/Electronic Manufacturing

Resumes

Resumes

Kris Dehnel Photo 1

Kris Dehnel

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Location:
Marble Falls, TX
Industry:
Electrical/Electronic Manufacturing
Education:
Caltech 1977 - 1981
Skills:
Semiconductors
Analog
Ic
Embedded Systems
Pcb Design
Hardware Architecture
Electrical Engineering

Business Records

Name / Title
Company / Classification
Phones & Addresses
Kris Dehnel
Secretary , Director
RUSTY ALLEN AIRPORT PROPERTY OWNERS ASSOCIATION, I
304 Flightline Rd, Leander, TX 78645
Kris Dehnel
Secretary , Director
Rusty Allen Airport Property Owners Association, Inc
304 Flightline Rd, Leander, TX 78645
Kris Dehnel
Tri-Delta Design Corp

Publications

Us Patents

Method For Control Of Overlap Times In Switching Power Converters

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US Patent:
8289010, Oct 16, 2012
Filed:
May 5, 2006
Appl. No.:
11/429484
Inventors:
Kenneth W. Fernald - Austin TX, US
Kris P. Dehnel - Cedar Park TX, US
Aaron Michael Shreeve - Austin TX, US
Assignee:
Zilker Labs, Inc. - Austin TX
International Classification:
G05F 1/00
US Classification:
323283, 323280, 323282
Abstract:
Embodiments of a system and method to control the overlap times—and deadtime delays—in power converters may support both overlapping and non-overlapping gate control signals, which may provide improved efficiency optimization across a wider range of applications. Various embodiments may be configured to provide careful partitioning between hardware implementation and software control, in order to better accommodate microprocessor-based power converters. Software algorithms may be used to avoid restrictions such as high gate impedance and changing load effects, and protection against errant operation may be provided using an overlap watchdog circuit. Various control circuits may be operated according to one or more algorithms configured to optimize both the HS-to-LS and LS-to-HS deadtime delays for obtaining minimum possible PWM duty cycle values to achieve improved power efficiency.

Pulse-Width Modulation Voltage Identification Interface

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US Patent:
20170288648, Oct 5, 2017
Filed:
Mar 31, 2016
Appl. No.:
15/087892
Inventors:
- San Jose CA, US
Kris Dehnel - Cedar Park TX, US
Benoit Herve - San Jose CA, US
International Classification:
H03K 3/012
H03K 3/017
H03K 5/003
Abstract:
Systems, methods, and devices for voltage identification using a pulse-width modulation signal are provided. Such an integrated circuit device may include an input/output (I/O) interface and voltage identification (VID) circuitry. The VID circuitry may be coupled to the input/output interface. The voltage identification circuitry may generate a voltage identification signal that is output on the input/output interface. The voltage identification signal may include a pulsed signal having a particular duty cycle that corresponds to a specified voltage level to enable a voltage regulator that receives the voltage identification signal to provide an input voltage to the integrated circuit device at the specified voltage level.
Control profile
Kris P Dehnel from Marble Falls, TX, age ~90 Get Report