Kenneth Ma Phones & Addresses
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Los Altos, CA
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100 Beacon St, Mountain View, CA 94040
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Milpitas, CA
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San Jose, CA
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Piscataway, NJ
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Kalamazoo, MI
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Santa Clara, CA
Business Records
Name / Title
Company / Classification
Phones & Addresses
Clearify Hosting
Internet - Web Hosting
Internet - Web Hosting
32 Kerrigan Crescent, Markham, ON L3R 7T5
(416) 953-8810
(416) 953-8810
Clearify Hosting
Internet - Web Hosting
Internet - Web Hosting
(416) 953-8810
Managing
Mars Motoring LLC
This LLC Is A Motor Vehicle Dealership
This LLC Is A Motor Vehicle Dealership
10390 N Blaney Ave, Cupertino, CA 95014
583 Saco Ter, Sunnyvale, CA 94089
583 Saco Ter, Sunnyvale, CA 94089
Publications
Us Patents
Method And Apparatus For The Conditional Enablement Of Pci Power Management
View pageUS Patent:
6959395, Oct 25, 2005
Filed:
Jun 26, 2002
Appl. No.:
10/180148
Inventors:
Kenneth Ma - Cupertino CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F001/26
G06F005/06
G06F001/28
G06F005/06
G06F001/28
US Classification:
713310, 713601, 713322
Abstract:
A method and apparatus are disclosed for conditionally enabling/disabling PCI power management in a computer-based system employing a central resource and an operating system. Non-CLKRUN# compatible PCI devices in the system are identified and whether or not the non-CLKRUN# compatible PCI devices are enabled is determined. The CLKRUN# support capability of the central resource, if available, is enabled or disabled based on, at least in part, the established status of the non-CLKRUN# compatible PCI devices. If enabled, PCI power management is provided by the CLKRUN# support capability according to the PCI CLKRUN# protocol for all CLKRUN# compatible PCI devices present in the computer-based system.
Method And Apparatus For Improving Bus Master Performance
View pageUS Patent:
6971033, Nov 29, 2005
Filed:
Jan 10, 2003
Appl. No.:
10/339843
Inventors:
Kenneth Ma - Cupertino CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F013/28
US Classification:
713300, 710110, 710113, 710116, 710117, 710119, 710123, 710124, 710309, 345531, 345535, 345541
Abstract:
A method and apparatus are disclosed for performing dynamic arbitration of memory accesses by a CPU and at least one bus master interface module based on, at least in part, monitoring a CPU throttle control signal and monitoring CPU power and performance states, and making decisions based on the monitored parameters. Bus master memory access break events and memory read and write accesses are also monitored as part of the arbitration process in accordance with certain embodiments of the present invention. An arbitration (ARB) module performs the dynamic arbitration. A CPU throttle control module generates the CPU throttle control signal, indicating when the CPU is idle, and also monitors and outputs the CPU power and performance states. A memory controller (MC) module controls accesses to the memory subsystem based on, at least in part, the dynamic arbitration performed by the dynamic arbitration module.
Method And Apparatus For Adaptive Cpu Power Management
View pageUS Patent:
7010708, Mar 7, 2006
Filed:
May 15, 2002
Appl. No.:
10/146554
Inventors:
Kenneth Ma - Cupertino CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F 1/32
US Classification:
713322, 713601
Abstract:
A method and apparatus are disclosed for performing adaptive run-time power management in a system employing a CPU and an operating system. A CPU cycle tracker (CCT) module monitors critical CPU signals and generates CPU performance data based on the critical CPU signals. An adaptive CPU throttler (THR) module uses the CPU performance data, along with a CPU percent idle value fed back from the operating system, to generate a CPU throttle control signal during predefined run-time segments of the CPU run time. The CPU throttle control signal links back to the CPU and adaptively adjusts CPU throttling and, therefore, power usage of the CPU during each of the run-time segments.
Method And Apparatus For Adaptive Power Management Of Memory Subsystem
View pageUS Patent:
7028200, Apr 11, 2006
Filed:
Jun 5, 2002
Appl. No.:
10/163746
Inventors:
Kenneth Ma - Cupertino CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F 1/32
US Classification:
713324, 713320
Abstract:
A method and apparatus are disclosed for performing adaptive memory power management in a system employing a CPU and a memory subsystem. A CPU throttle control (THR) module generates a CPU throttle control signal indicating when the CPU is idle. A memory controller (MC) module generates memory power management signals based on at least one of the CPU throttle control signal, memory read/write signals, memory access break events, and bus master access requests. Certain portions of the memory subsystem are powered down in response to the memory power management signals. Memory power management is performed on a time segment by time segment basis to achieve efficient power management of the memory subsystem during CPU run time.
Method And Apparatus For Improving Bus Master Performance
View pageUS Patent:
7231534, Jun 12, 2007
Filed:
Jul 26, 2005
Appl. No.:
11/189688
Inventors:
Kenneth Ma - Cupertino CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F 1/26
US Classification:
713323, 713300, 713310, 713320, 713321, 713322, 713324, 713330, 713340
Abstract:
A method and apparatus are disclosed for performing dynamic arbitration of memory accesses by a CPU and at least one bus master interface module based on, at least in part, monitoring a CPU throttle control signal and monitoring CPU power and performance states, and making decisions based on the monitored parameters. Bus master memory access break events and memory read and write accesses are also monitored as part of the arbitration process in accordance with certain embodiments of the present invention. An arbitration (ARB) module performs the dynamic arbitration. A CPU throttle control module generates the CPU throttle control signal, indicating when the CPU is idle, and also monitors and outputs the CPU power and performance states. A memory controller (MC) module controls accesses to the memory subsystem based on, at least in part, the dynamic arbitration performed by the dynamic arbitration module.
Method And System For Disaster Recovery Of Data From A Storage Device
View pageUS Patent:
7415115, Aug 19, 2008
Filed:
May 14, 2003
Appl. No.:
10/437532
Inventors:
Kenneth Ma - Cupertino CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H04L 9/00
H04K 1/00
G06F 11/30
G06F 3/023
G06F 21/00
H03M 11/10
H03M 11/12
H04L 9/08
H04K 1/00
G06F 11/30
G06F 3/023
G06F 21/00
H03M 11/10
H03M 11/12
H04L 9/08
US Classification:
380286, 380 30, 380277, 713193
Abstract:
Aspects of the invention provide a method and system for securely managing the storage and retrieval of data. Securely managing the storage and retrieval of data may include receiving a first disaster recovery code and acquiring a first password corresponding to the first disaster recovery code. A first disaster recovery key may be generated based on the first disaster recovery code and the first password. Another aspect of the invention may also include generating the received first disaster recovery code based on said first password and the first disaster recovery key. The generated disaster recovery code may be securely stored on at least a portion of a storage device or a removable media. Data stored on the storage device may be encrypted using the first generated disaster recovery key. Additionally, data read from the storage device may be decrypted using the generated first disaster recovery key.
Method And Apparatus For Adaptive Power Management Of Memory Subsystem
View pageUS Patent:
7506192, Mar 17, 2009
Filed:
Jan 5, 2006
Appl. No.:
11/326055
Inventors:
Kenneth Ma - Cupertino CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F 1/32
US Classification:
713324, 713320, 713323
Abstract:
A method and apparatus are disclosed for performing adaptive memory power management in a system employing a CPU and a memory subsystem. A CPU throttle control (THR) module generates a CPU throttle control signal indicating when the CPU is idle. A memory controller (MC) module generates memory power management signals based on at least one of the CPU throttle control signal, memory read/write signals, memory access break events, and bus master access requests. Certain portions of the memory subsystem are powered down in response to the memory power management signals. Memory power management is performed on a time segment by time segment basis to achieve efficient power management of the memory subsystem during CPU run time.
Method And Apparatus For Improving Bus Master Performance
View pageUS Patent:
7523324, Apr 21, 2009
Filed:
May 7, 2007
Appl. No.:
11/745047
Inventors:
Kenneth Ma - Cupertino CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F 13/28
US Classification:
713300, 710110, 710113, 710116, 710117, 710119, 710123, 710124, 345535, 345541
Abstract:
A method and apparatus are disclosed for performing dynamic arbitration of memory accesses by a CPU and at least one bus master interface module based on, at least in part, monitoring a CPU throttle control signal and monitoring CPU power and performance states, and making decisions based on the monitored parameters. Bus master memory access break events and memory read and write accesses are also monitored as part of the arbitration process in accordance with certain embodiments of the present invention. An arbitration (ARB) module performs the dynamic arbitration. A CPU throttle control module generates the CPU throttle control signal, indicating when the CPU is idle, and also monitors and outputs the CPU power and performance states. A memory controller (MC) module controls accesses to the memory subsystem based on, at least in part, the dynamic arbitration performed by the dynamic arbitration module.
Wikipedia
Kenneth Ma
View pageKenneth Ma Kwok Ming (born February 13, 1974) is a Hong Kong TVB actor. He graduated from University of British Columbia majoring in Mechanical Engineering. ...