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Kennedy K Cheruiyot

from Spencerport, NY
Age ~56
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Also known as:
Kennedy Wendy Cheruiyot, Kennedy K Cherviyot, Cheruiyot Kennedy, Kennedy T
Related to:
Jelagat CheruiyotMark J Thomas, 44C KennedyDorothy J Cherulyot, 46Felix K Cheruiyot, 47Dorothy Jelaga CherviyotWendy T Cheruiyot, 49Sally F Thomas, 76Martha T Otto, 51Ernest E Thomas, 81
Connected to:
Julius K Cheruiyot, 41Michael Cheruiyot, 37Michael Cheruka, 43Pradeep Cherukat, 64Vinod Cherukatt, 65Madhuri Cherukuri, 46Pramod Cheruku, 46Prathima Cherukupali, 44Rao Cherukuri, 85Reena Cherukuri, 47

Kennedy Cheruiyot Phones & Addresses

  • Spencerport, NY
  • Pavilion, NY
  • 11 Tina Dr, Gardiner, NY 12525 (845) 419-2631
  • 4339 10Th St, Rochester, MN 55901 (507) 529-3652
  • 3065 Brittany Ln NW, Rochester, MN 55901
  • 3516 Farmington Dr, Greensboro, NC 27407 (336) 856-7508
  • Brockport, NY
  • Rochester, NY
  • 3516 Farmington Dr APT C, Greensboro, NC 27407 (910) 295-6984

Work

Company: Ibm - Rochester, MN Jun 2003 Position: Analog/mixed signal design engineer (staff)

Education

School / High School: North Carolina A & T State University 2003 Specialities: MS in Electrical Engineering

Resumes

Resumes

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Kennedy Cheruiyot

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Kennedy Cheruiyot

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Kennedy Cheruiyot Rochester, MN

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Work:
IBM
Rochester, MN
Jun 2003 to Mar 2012
Analog/Mixed Signal Design Engineer (Staff)
RF Micro Devices
Greensboro, NC
May 2000 to Apr 2003
Senior Production Support Technician
RF Micro Devices
Greensboro, NC
Sep 2001 to May 2002
Teaching Assistant
ENI
Rochester, NY
Jun 1999 to May 2000
Electronic Test Technician
Kenya Air Force

Mar 1987 to May 1996
Avionics Technician (Radar and Radio Specialist)
Education:
North Carolina A & T State University
2003
MS in Electrical Engineering
North Carolina A & T State University
2001
BS in Electrical Engineering
Genesee Community College
Batavia, NY
1999
AS in Engineering Science
Armed Forces Technical College
1993
AS in Engineering Avionics
Kennedy Cheruiyot Photo 4

Kennedy Cheruiyot

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Publications

Us Patents

Implementing Integral Dynamic Voltage Sensing And Trigger

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US Patent:
8513957, Aug 20, 2013
Filed:
Jun 2, 2010
Appl. No.:
12/792160
Inventors:
Kennedy K. Cheruiyot - Rochester MN, US
Joel T. Ficke - Blommer WI, US
David M. Friend - Rochester MN, US
Grant P. Kesselring - Rochester MN, US
James D. Strom - Rochester MN, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G01R 29/26
H03L 7/00
H03K 3/03
US Classification:
324613, 331 2, 331 46
Abstract:
A method and circuit for implementing dynamic voltage sensing and a trigger circuit, and a design structure on which the subject circuits resides are provided. The voltage sensing circuit includes a first quiet oscillator generating a reference clock, and a second noisy oscillator generating a noisy clock. A digital control loop coupled to the first quiet oscillator and the second noisy oscillator matches frequency of the first quiet oscillator and the second noisy oscillator. The reference clock drives a first predefined-bit shift register and the noisy clock drives a second predefined-bit shift register, where the second predefined-bit shift register is greater than the first predefined-bit shift register. When the first predefined-bit shift register overflows, the contents of the second predefined-bit shift register are evaluated. The contents of the second predefined-bit shift register are compared with a noise threshold select value to identify a noise event and trigger a noise detector control output.

Power Supply Noise Insensitive Charge Pump, Loop Filter, Vco Control, And Vco

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US Patent:
20070200636, Aug 30, 2007
Filed:
Feb 23, 2006
Appl. No.:
11/360352
Inventors:
Kennedy Cheruiyot - Rochester MN, US
Michael Repede - Rochester MN, US
James Strom - Rochester MN, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H03L 7/00
US Classification:
331016000
Abstract:
An oscillating circuit includes a charge pump, a loop filter and a voltage controlled oscillator. The charge pump and the loop filter generates a differential voltage signal. The loop filter is responsive to the differential voltage signal and generates a filtered differential voltage control signal that is proportional to the differential voltage signal. The voltage controlled oscillator is responsive to the filtered differential voltage control signal and generates a periodic signal that has a frequency that corresponds to the filtered differential voltage control signal.

Implementing Control Voltage Mirror

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US Patent:
20130088269, Apr 11, 2013
Filed:
Oct 5, 2011
Appl. No.:
13/253395
Inventors:
Kennedy K. Cheruiyot - Rochester MN, US
Joel T. Ficke - Bloomer WI, US
David M. Friend - Rochester MN, US
Grant P. Kesselring - Rochester MN, US
James D. Strom - Rochester MN, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY
International Classification:
H03L 7/08
G06F 17/50
US Classification:
327156, 716100
Abstract:
A circuit for implementing a control voltage mirror for phase error and jitter performance optimization and a design structure on which the subject circuit resides are provided. The control voltage mirror is used with a phase locked loop filter utilizing a thin oxide filter capacitor connected to a control voltage and a distal side of the capacitor connected to a voltage reference. The control voltage mirror includes an operational amplifier holding voltage across the capacitor to be near or at zero volts, substantially eliminating capacitor leakage current to provide phase error and jitter performance optimization.

Set-Based Object Management System

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US Patent:
20210089730, Mar 25, 2021
Filed:
Sep 25, 2019
Appl. No.:
16/581832
Inventors:
- Armonk NY, US
Edward C. McCAIN - Lagrangeville NY, US
Yufei WU - Poughkeepsie NY, US
Kennedy CHERUIYOT - Gardiner NY, US
Ali Y. DUALE - Poughkeepsie NY, US
International Classification:
G06K 7/10
H04W 4/029
Abstract:
A management system monitors a set of objects of a user by wirelessly communicating with one or more location components associated with the objects, and each object of the set has a respective location component. The monitoring includes ascertaining by the management system, based at least in part on data obtained via wireless communication with the location component(s), a spatial centroid of the set and a spatial separation of an object in the set from the spatial centroid, and correlating the ascertained spatial centroid to a context classification of multiple context classifications. The management system further determines whether a difference between the ascertained spatial separation and the average spatial separation of the location component(s) for the correlated context classification exceeds an acceptable spatial separation tolerance. Based on the difference exceeding the acceptable tolerance, the management system provides an electronic alert to the user.

Implementing Compact Current Mode Logic (Cml) Inductor Capacitor (Lc) Voltage Controlled Oscillator (Vco) For High-Speed Data Communications

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US Patent:
20140132321, May 15, 2014
Filed:
Nov 13, 2012
Appl. No.:
13/675650
Inventors:
- Armonk NY, US
James D. Strom - Rochester MN, US
Kenneth A. Van Goor - Fall Creek WI, US
Kennedy K. Cheruiyot - Rochester MN, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H03L 7/099
US Classification:
327159
Abstract:
A method and a phase locked loop (PLL) circuit for implementing compact current mode logic inductor capacitor voltage controlled oscillator for high speed communications, and a design structure on which the subject circuit resides are provided. The PLL circuit includes a current mode logic (CML) inductor capacitor (LC) Voltage Controlled Oscillator (VCO). The PLL circuit includes a reference circuit generates a virtual ground node for biasing noise sensitive components, providing level shifted VCO increment and decrement tuning values from a phase detector coupled by a respective resistor to tune a varactor of the LC VCO, and providing a loop filter function. The virtual ground node tracks a logic power supply noise, incurring no jitter penalty, and eliminating the need for a separate power supply for the PLL circuit.
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Kennedy K Cheruiyot from Spencerport, NY, age ~56 Get Report