Resumes
Resumes
Principal Soc And Asic Architect And Design Engineer
View pageLocation:
19355 Via Real Dr, Saratoga, CA 95070
Industry:
Consumer Electronics
Work:
Amlogic, Inc.
Principal Soc and Asic Architect and Design Engineer
Cavium Inc Apr 2009 - Jul 2012
Senior Soc and Asic Design Engineer
Celestial Semiconductor Sep 2004 - Apr 2009
Founding Director and Architect of Soc and Asic Development
Zytera Systems Jul 2002 - May 2004
Founding Director and Architect of Soc and Asic Development
Caly Networks May 1999 - May 2002
Principal Asic Design Engineer
Principal Soc and Asic Architect and Design Engineer
Cavium Inc Apr 2009 - Jul 2012
Senior Soc and Asic Design Engineer
Celestial Semiconductor Sep 2004 - Apr 2009
Founding Director and Architect of Soc and Asic Development
Zytera Systems Jul 2002 - May 2004
Founding Director and Architect of Soc and Asic Development
Caly Networks May 1999 - May 2002
Principal Asic Design Engineer
Education:
Stanford University
Masters, Master of Science In Electrical Engineering, Electrical Engineering
Masters, Master of Science In Electrical Engineering, Electrical Engineering
Skills:
Soc
Asic
Fpga
H.264
Static Timing Analysis
Logic Design
Verilog
Eda
Rtl Coding
Processors
Wireless
Device Drivers
Rtl Design
Application Specific Integrated Circuits
Ic
Systemverilog
Field Programmable Gate Arrays
System on A Chip
Asic
Fpga
H.264
Static Timing Analysis
Logic Design
Verilog
Eda
Rtl Coding
Processors
Wireless
Device Drivers
Rtl Design
Application Specific Integrated Circuits
Ic
Systemverilog
Field Programmable Gate Arrays
System on A Chip
Languages:
English