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John Lewars Phones & Addresses

  • 2 Summerlyn Dr, Ephrata, PA 17522
  • Lancaster, PA
  • 874 Center St, Mount Joy, PA 17552 (717) 684-8440
  • Brooklyn, NY
  • N Hollywood, CA
  • Pottsville, PA
  • Silver Spring, PA

Work

Company: Rr donnelley Position: Machinist

Industries

Printing

Resumes

Resumes

John Lewars Photo 1

Machinist

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Location:
Lancaster, PA
Industry:
Printing
Work:
Rr Donnelley
Machinist

Business Records

Name / Title
Company / Classification
Phones & Addresses
John Lewars
Principal
Picture This Productions, LLC
Motion Picture/Tape Distribution
812 Park Ave, Uptown, NJ 07030

Publications

Us Patents

Hardware Multi-Threading Co-Scheduling For Parallel Processing Systems

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US Patent:
20130275988, Oct 17, 2013
Filed:
Jun 11, 2013
Appl. No.:
13/914893
Inventors:
Liana L. FONG - Irvington NY, US
John LEWARS - New Paltz NY, US
Seetharami R. SEELAM - Yorktown Heights NY, US
Brian F. VEALE - Cedar Park TX, US
International Classification:
G06F 9/54
US Classification:
718103, 718106
Abstract:
A method, information processing system, and computer program product are provided for managing operating system interference on applications in a parallel processing system. A mapping of hardware multi-threading threads to at least one processing core is determined, and first and second sets of logical processors of the at least one processing core are determined. The first set includes at least one of the logical processors of the at least one processing core, and the second set includes at least one of a remainder of the logical processors of the at least one processing core. A processor schedules application tasks only on the logical processors of the first set of logical processors of the at least one processing core. Operating system interference events are scheduled only on the logical processors of the second set of logical processors of the at least one processing core.

Hardware Multi-Threading Co-Scheduling For Parallel Processing Systems

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US Patent:
20170371725, Dec 28, 2017
Filed:
Aug 24, 2017
Appl. No.:
15/685506
Inventors:
- Armonk NY, US
Liana L. FONG - Irvington NY, US
John LEWARS - New Paltz NY, US
Seetharami R. SEELAM - Yorktown Heights NY, US
Brian F. VEALE - Cedar Park TX, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 9/54
G06F 9/38
G06F 9/48
Abstract:
A method, information processing system, and computer program product are provided for managing operating system interference on applications in a parallel processing system. A mapping of hardware multi-threading threads to at least one processing core is determined, and first and second sets of logical processors of the at least one processing core are determined. The first set includes at least one of the logical processors of the at least one processing core, and the second set includes at least one of a remainder of the logical processors of the at least one processing core. A processor schedules application tasks only on the logical processors of the first set of logical processors of the at least one processing core. Operating system interference events are scheduled only on the logical processors of the second set of logical processors of the at least one processing core.
John H Lewars from Ephrata, PA, age ~70 Get Report