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Jeremiah Hebding Phones & Addresses

  • Feura Bush, NY
  • East Berne, NY
  • 6 Lyons Dr, Poughkeepsie, NY 12601
  • Hyde Park, NY
  • Canandaigua, NY
  • Wappingers Falls, NY
  • Rochester, NY
  • Standish, ME
  • Spencerport, NY
  • Naples, NY

Work

Company: Suny albany - college of nanoscale science and engineering Jun 2010 Position: Derivative technology development

Education

Degree: Master of Science (MS) School / High School: Rochester Institute of Technology 1998 to 2005 Specialities: Microelectronic Engineering

Skills

Semiconductors • Cmos • Design of Experiments • Failure Analysis • Semiconductor Industry • Materials Science • Nanotechnology • Engineering • Pcb Design • Process Engineering • Process Integration • Process Simulation • R&D • Spc • Thin Films • Silicon Photonics • Program Management

Industries

Semiconductors

Resumes

Resumes

Jeremiah Hebding Photo 1

Technology Integration

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Location:
East Berne, NY
Industry:
Semiconductors
Work:
SUNY Albany - College of Nanoscale Science and Engineering since Jun 2010
Derivative Technology Development

IBM Feb 2008 - Jun 2010
Derivative Technology Development

IBM Jul 2005 - Jun 2008
Lithography Manufacturing Engineer
Education:
Rochester Institute of Technology 1998 - 2005
Master of Science (MS), Microelectronic Engineering
Skills:
Semiconductors
Cmos
Design of Experiments
Failure Analysis
Semiconductor Industry
Materials Science
Nanotechnology
Engineering
Pcb Design
Process Engineering
Process Integration
Process Simulation
R&D
Spc
Thin Films
Silicon Photonics
Program Management

Publications

Us Patents

Apparatus And Method For Thin Die-To-Wafer Bonding

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US Patent:
20130273691, Oct 17, 2013
Filed:
Apr 12, 2012
Appl. No.:
13/445550
Inventors:
Daniel PASCUAL - Wolcott VT, US
Jeremiah HEBDING - Poughkeepsie NY, US
Megha RAO - Clifton Park NY, US
Colin McDONOUGH - Albany NY, US
Douglas Duane COOLBAUGH - Highland NY, US
Joseph PICCIRILLO, JR. - Clifton Park NY, US
Michael LIEHR - Guilderland NY, US
Assignee:
THE RESEARCH FOUNDATION OF STATE UNIVERSITY OF NEW YORK - Albany NY
International Classification:
H01L 21/50
B23K 37/04
H01L 21/762
US Classification:
438107, 438458, 228 447, 257E21567, 257E21499
Abstract:
A method is provided for bonding a die to a base technology wafer and includes: providing a device wafer having a front, back, at least one side, and at least one TSV, wherein the back contains a substrate material; providing a carrier wafer having a front, back, and at least one side; bonding the wafers using an adhesive; removing the substrate material and wet etching, from the device wafer's back side, to expose at least one metallization scheme feature; processing the device wafer's back side to create at least one backside redistribution layer; removing the device wafer from the carrier wafer; dicing the device wafer into individual die; providing a base technology wafer; coating the front of the base technology wafer with a sacrificial adhesive; placing the front of the individual die onto the front of the base technology wafer; and bonding the individual die to the base technology wafer.

Apparatus And Method For Integration Of Through Substrate Vias

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US Patent:
20130270711, Oct 17, 2013
Filed:
Apr 12, 2012
Appl. No.:
13/445636
Inventors:
Jeremiah HEBDING - Poughkeepsie NY, US
Megha RAO - Clifton Park NY, US
Colin McDONOUGH - Albany NY, US
Matthew SMALLEY - Ballston Lake NY, US
Douglas Duane COOLBAUGH - Highland NY, US
Joseph PICCIRILLO, JR. - Clifton Park NY, US
Stephen G. BENNETT - Niskayuna NY, US
Michael LIEHR - Guilderland NY, US
Daniel PASCUAL - Wolcott VT, US
Assignee:
The Research Foundation Of State University Of New York - Albany NY
International Classification:
H01L 23/538
H01L 21/762
H01L 21/50
H01L 21/768
US Classification:
257774, 438675, 438455, 438118, 257E21586, 257E21567, 257E21499, 257E23174
Abstract:
An apparatus and method are provided for integrating TSVs into devices prior to device contacts processing. The apparatus includes a semiconducting layer; one or more CMOS devices mounted on a top surface of the semiconducting layer; one or more TSVs integrated into the semiconducting layer of the device wafer; at least one metal layer applied over the TSVs; and one or more bond pads mounted onto a top layer of the at least one metal layer, wherein the at least one metal layer is arranged to enable placement of the one or more bond pads at a specified location for bonding to a second device wafer. The method includes obtaining a wafer of semiconducting material, performing front end of line processing on the wafer; providing one or more TSVs in the wafer; performing middle of line processing on the wafer; and performing back end of line processing on the wafer.

Manufacturing Methods For Dual Pore Sensors

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US Patent:
20220242725, Aug 4, 2022
Filed:
Apr 15, 2020
Appl. No.:
17/617151
Inventors:
- Santa Clara CA, US
Roger QUON - Rhinebeck NY, US
Archana KUMAR - Mountain View CA, US
Ryan Scott SMITH - Clifton Park NY, US
Jeremiah HEBDING - East Berne NY, US
Raghav SREENIVASAN - Fremont CA, US
International Classification:
B82B 3/00
B81C 1/00
B82Y 15/00
B82Y 40/00
Abstract:
Embodiments of the present disclosure provide methods of forming solid state dual pore sensors which may be used for biopolymer sequencing and dual pore sensors formed therefrom. In one embodiment, a method of forming a dual pore sensor includes providing a pattern in a surface of a substrate. Generally, the pattern features two fluid reservoirs separated by a divider wall. The method further includes depositing a layer of sacrificial material into the two fluid reservoirs, depositing a membrane layer, patterning two nanopores through the membrane layer, removing the sacrificial material from the two fluid reservoirs, and patterning one or more fluid ports and a common chamber.

Dual Pore Sensors

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US Patent:
20220236250, Jul 28, 2022
Filed:
Apr 15, 2020
Appl. No.:
17/617153
Inventors:
- Santa Clara CA, US
Roger QUON - Rhinebeck NY, US
Archana KUMAR - Mountain View CA, US
Ryan Scott SMITH - Clifton Park NY, US
Jeremiah HEBDING - East Berne NY, US
Raghav SREENIVASAN - Fremont CA, US
International Classification:
G01N 33/487
Abstract:
Embodiments of the present disclosure provide methods of forming solid state dual pore sensors which may be used for biopolymer sequencing and dual pore sensors formed therefrom. In one embodiment, a dual pore sensor features a substrate having a patterned surface comprising two recessed regions spaced apart by a divider wall and a membrane layer disposed on the patterned surface. The membrane layer, the divider wall, and one or more surfaces of each of the two recessed regions collectively define a first fluid reservoir and a second fluid reservoir. A first nanopore is disposed through a portion of the membrane layer disposed over the first fluid reservoir and a second nanopore is disposed through a portion of the membrane layer disposed over the second fluid reservoir. Herein, opposing surfaces of the divider wall are sloped to each form an angle of less than 90 with a respective reservoir facing surface of the membrane layer.
Jeremiah L Hebding from Feura Bush, NY, age ~44 Get Report