Inderjit Singh

6364089, Apr 2, 2002

Dec 10, 1999

09/549241

Inderjit Singh - San Jose CA
Jaime A. Bayan - Palo Alto CA
Hem Takiar - Fremont CA
Ashok S. Prabhu - Sunnyvale CA

National Semiconductor Corporation - Santa Clara CA

B65G 4724

198408, 198406, 198403

The invention relates to apparatus and methods for semiconductor device handling. In one aspect, the invention relates to a rotary flipper including a wheel having a plurality of stations. A semiconductor device is placed within a first station in a first orientation. While the semiconductor device is held, the wheel portion of the rotary flipper rotates and the next station receives another semiconductor device. When the first station is in an unloading position, the semiconductor device is released. At this point, the semiconductor device is oriented in a second position. In one aspect, the semiconductor device is released into a cavity of a tape and reel. In another aspect, vacuum pressure is applied to hold the die. In one embodiment, the invention relates to a semiconductor device handling apparatus and apparatus that includes of a rotary semiconductor device flipper.

6459143, Oct 1, 2002

Apr 26, 2001

09/844062

Inderjit Singh - San Jose CA
Hem P. Takiar - Fremont CA
Ranjan J. Mathew - San Jose CA
Nikhil V. Kelkar - Santa Clara CA

National Semiconductor Corporation - Santa Clara CA

H01L 2358

257665, 257666, 257676, 257686, 257685, 257669

Improved methods of packaging external fuses together with integrated circuit devices are described. A pair of frame strips are provided that each have an associated set of contact pads. A resistor paste is applied to one of the contact pad sets and the frame strips are laminated together by curing the resistor paste which is positioned between the contact pad sets. Dice are mounted to the opposite sides of the second contact pads to form integrated circuit devices having integrally packaged external fuses. The packaged devices are eventually singulated for use. In some embodiments, the contact pads each have downturned tabs that form wings on opposite sides of each die. When the dice are flip chips, a device may be attached to a substrate board by soldering both the bumps on the die and the tab wing tips to the substrate board. In a preferred embodiment, the resistor paste is a positive temperature coefficient resistor paste.

6489879, Dec 3, 2002

Dec 10, 1999

09/549240

Inderjit Singh - San Jose CA
Hem Takiar - Fremont CA
Geoffrey Cade Murray - Fremont CA

National Semiconductor Corporation - Santa Clara CA

H01H 85044

337167, 337153, 337182, 337183

An improved PTC fuse assembly is described. The PTC fuse assembly includes a PTC fuse having a PTC material. To expedite heating of the PTC material, the improved PTC fuse assembly includes a die package in thermal communication with the PTC material. The die package includes a die which is responsible generating heat once a threshold has been reached. To mount the die package to a printed circuit board, the die package includes leads. The leads are sufficiently flexible such that the heat generated by the die does not compromise performance of the PTC protection circuit.

6580165, Jun 17, 2003

Nov 16, 2000

09/715740

Inderjit Singh - San Jose CA

Fairchild Semiconductor Corporation - South Portland ME

H05K 114

257696, 257797, 257666, 257738, 257737, 257673, 257698, 257778, 361749, 361776, 361783

A flip-chip with a solder pre-plated leadframe that includes locating holes. The leadframe does not include a die attach pad. Two of the leads include a locating or alignment hole for receiving a solder bump of the bumped die. The remaining leads include die contact areas for placement of the die thereon with the solder bumps contacting the die contact areas. The leads with the die contact areas are downset. The downset is approximately 4 mm.

6890793, May 10, 2005

Apr 17, 2003

10/419281

Inderjit Singh - San Jose CA, US

Fairchild Semiconductor Corporation - South Portland ME

H01L021/283
H01L021/60
G01L021/58

438107, 438108, 438598, 438612, 438687, 438164, 438412, 438455, 438113, 438618, 438106, 438127, 257797, 257738, 257778, 257673, 257737, 257696, 257666

A method for producing a die package is disclosed. A bumped die comprises solder bumps mounted to a leadframe including a first lead comprising a first locating hole and a second lead comprising a second locating hole. The solder bumps are present in the first and second locating holes, and a molding material is formed around the die.

7254033, Aug 7, 2007

Aug 19, 2004

10/922396

Behdad Jafari - Saratoga CA, US
Inderjit Singh - Saratoga CA, US

H05K 7/20

361719, 361704, 361705, 361718, 257675, 257706, 257707, 165 803, 165185

Embodiments of methods, apparatuses, devices, and/or systems for heat dissipation are disclosed.

7429528, Sep 30, 2008

Jan 28, 2005

11/046420

Inderjit Singh - Saratoga CA, US
Howard Lee Marks - Gilroy CA, US
Joseph David Greco - San Jose CA, US

NVIDIA Corporation - Santa Clara CA

H01L 21/44
H01L 21/4763

438666, 438612, 438618, 438622

An integrated circuit and method of fabricating the same are provided. Included are an active circuit, and a metal layer disposed, at least partially, above the active circuit. Further provided is a bond pad disposed, at least partially, above the metal layer. To prevent damage incurred during a bonding process, the aforementioned metal layer is meshed.

7453158, Nov 18, 2008

Jul 31, 2003

10/633004

Inderjit Singh - Saratoga CA, US
Howard Lee Marks - Gilroy CA, US
Joseph David Greco - San Jose CA, US

NVIDIA Corporation - Santa Clara CA

H01L 23/48
H01L 23/52

257786, 257758, 257773, 257776

An integrated circuit and method of fabricating the same are provided. Included are an active circuit, and a metal layer disposed, at least partially, above the active circuit. Further provided is a bond pad disposed, at least partially, above the metal layer. To prevent damage incurred during a bonding process, the aforementioned metal layer is meshed.