Hisayuki Shimada Phones & Addresses
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373 River Oaks Cir, San Jose, CA 95134 (408) 432-8740
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Sunnyvale, CA
Publications
Us Patents
Individual Source Line To Decrease Column Leakage
View pageUS Patent:
62720465, Aug 7, 2001
Filed:
May 2, 2000
Appl. No.:
9/562748
Inventors:
Hisayuki Shimada - San Jose CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G11C 1604
US Classification:
36518517
Abstract:
A flash memory device and a method to read the flash memory device to decrease leakage current during read. The flash memory device has a source line control circuit connected to the sources of memory cells in a row and during read the source line control circuit connects the sources of the memory cells in a row to ground.
Decoded Source Lines To Tighten Erase Vt Distribution
View pageUS Patent:
62855999, Sep 4, 2001
Filed:
May 2, 2000
Appl. No.:
9/562747
Inventors:
Hisayuki Shimada - San Jose CA
Wing Leung - Cupertino CA
Wing Leung - Cupertino CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
G11C 1604
US Classification:
36518529
Abstract:
A flash memory device and a method to erase the flash memory device having a plurality of memory cells each having a source, a drain, a control gate, wherein the memory cells are organized in rows and columns with a wordline attached to the control gates of the memory cells in a row, with a bitline attached to the drains of cells in a column and a sourceline attached to the sources of cells in a row, and a switch connected between each sourceline and V. sub. S is controlled by sourceline decode circuit that opens a sourceline switch after the cells on the associated wordline verify as erased.