Inventors:
Glenn Eric Rinkenberger - Austin TX
William K. Oh - Gilbert AZ
David Michael Harrison - Mesa AZ
Chuckwudi Perry - Scottsdale AZ
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
G06F 1128
Abstract:
A processing system includes a control flow monitor (CFM) checker for verifying a sequence of instructions performed by a pipelined processor (101). The CFM checker provides fail safe assurance against run-time errors in the sequence of instructions performed by a processor. The CFM checker verifies instruction sequence during run-time within 32 instruction cycles. The processing system provides an improved system and method having a CFM checker which minimizes wasted instruction cycles when performing branch instructions in a software program. Using a prefetch capability of an instruction pipeline and storing fixwords sequentially in memory, eliminates unnecessary instructions to fetch fixword values from external tables, thereby saving instructions and instruction cycles.