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Frank S Menagh

from Santa Cruz, CA
Age ~71
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Also known as:
Frank Steven Menagh
Related to:
Timothy J Dugan, 53Harry WebbHugh Webb, 83George Corliss, 96Neil Dudney, 91Candri A Webb, 39
Connected to:
Denise S Menagh, 68Gary R Menagh, 58James A Menagh, 84John R Menagh, 67Mara Menahan, 32Michal B Menahem, 49Emeka I Menakaya, 40Danny R Menake, 72Larisa Menaker, 63Linda M Menaker, 75

Frank Menagh Phones & Addresses

  • Santa Cruz, CA
  • Felton, CA
  • 126 Cool Creek Trl, Santa Cruz, CA 95060

Work

Company: Sandhill cove Jan 2006 Position: Member of various committee's

Education

Degree: Master Education Management School / High School: University of Minnesota-Twin Cities 1950 to 1951 Specialities: Park & Recreation Administration

Languages

English

Interests

Aerobics • Cooking • Exercise • Electronics • Home Improvement • Reading • Crafts • Gourmet Cooking • Fitness • Home Decoration

Industries

Leisure, Travel, & Tourism

Resumes

Resumes

Frank Menagh Photo 1

Member Of Various Committee's

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Location:
1100 southwest Shoreline Dr, Palm City, FL 34990
Industry:
Leisure, Travel, & Tourism
Work:
Sandhill Cove since Jan 2006
Member of Various Committee's
Education:
University of Minnesota-Twin Cities 1950 - 1951
Master Education Management, Park & Recreation Administration
Interests:
Aerobics
Cooking
Exercise
Electronics
Home Improvement
Reading
Crafts
Gourmet Cooking
Fitness
Home Decoration
Languages:
English

Publications

Us Patents

Semiconductor Wafer Processing System With Vertically-Stacked Process Chambers And Single-Axis Dual-Wafer Transfer System

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US Patent:
6846149, Jan 25, 2005
Filed:
Nov 27, 2001
Appl. No.:
09/996869
Inventors:
Richard N. Savage - Scotts Valley CA, US
Frank S. Menagh - Santa Cruz CA, US
Helder R. Carvalheira - Scotts Valley CA, US
Philip A. Troiani - Santa Cruz CA, US
Dan L. Cossentine - Santa Cruz CA, US
Eric R. Vaughan - Santa Cruz CA, US
Bruce E. Mayer - Soquel CA, US
Assignee:
Aviza Technology, Inc. - Scotts Valley CA
International Classification:
B25J 1510
F26B 308
US Classification:
414416, 414217, 414941
Abstract:
A semiconductor wafer processing system including a multi-chamber module having vertically-stacked semiconductor wafer process chambers and a loadlock chamber dedicated to each semiconductor wafer process chamber. Each process chamber includes a chuck for holding a wafer during wafer processing. The multi-chamber modules may be oriented in a linear array. The system further includes an apparatus having a dual-wafer single-axis transfer arm including a monolithic arm pivotally mounted within said loadlock chamber about a single pivot axis. The apparatus is adapted to carry two wafers, one unprocessed and one processed, simultaneously between the loadlock chamber and the process chamber. A method utilizing the disclosed system is also provided.

Semiconductor Wafer Processing System With Vertically-Stacked Process Chambers And Single-Axis Dual-Wafer Transfer System

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US Patent:
20010010950, Aug 2, 2001
Filed:
Jan 22, 2001
Appl. No.:
09/767659
Inventors:
Richard Savage - Scotts Valley CA, US
Frank Menagh - Santa Cruz CA, US
Helder Carvalheria - Scotts Valley CA, US
Philip Troiani - Santa Cruz CA, US
Dan Cossentine - Santa Cruz CA, US
Eric Vaughan - Santa Cruz CA, US
Bruce Mayer - Soquel CA, US
Assignee:
Silicon Valley Group Thermal Systems LLC
International Classification:
H01L021/44
US Classification:
438/124000
Abstract:
A semiconductor wafer processing system including a multi-chamber module having vertically-stacked semiconductor wafer process chambers and a loadlock chamber dedicated to each semiconductor wafer process chamber. Each process chamber includes a chuck for holding a wafer during wafer processing. The multi-chamber modules may be oriented in a linear array. The system further includes an apparatus having a dual-wafer single-axis transfer arm including a monolithic arm pivotally mounted within said loadlock chamber about a single pivot axis. The apparatus is adapted to carry two wafers, one unprocessed and one processed, simultaneously between the loadlock chamber and the process chamber. A method utilizing the disclosed system is also provided.

Semiconductor Wafer Processing System With Vertically-Stacked Process Chambers And Single-Axis Dual-Wafer Transfer System

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US Patent:
6610150, Aug 26, 2003
Filed:
Jan 13, 2000
Appl. No.:
09/483945
Inventors:
Richard N. Savage - Scotts Valley CA
Frank S. Menagh - Santa Cruz CA
Helder R. Carvalheira - Scotts Valley CA
Philip A. Troiani - Santa Cruz CA
Dan L. Cossentine - Santa Cruz CA
Eric R. Vaughan - Santa Cruz CA
Bruce E. Mayer - Soquel CA
Assignee:
ASML US, Inc. - Scotts Valley CA
International Classification:
C23C 1600
US Classification:
118719, 118724, 118729
Abstract:
A semiconductor wafer processing system including a multi-chamber module having vertically-stacked semiconductor wafer process chambers and a loadlock chamber dedicated to each semiconductor wafer process chamber. Each process chamber includes a chuck for holding a wafer during wafer processing. The multi-chamber modules may be oriented in a linear array. The system further includes an apparatus having a dual-wafer single-axis transfer arm including a monolithic arm pivotally mounted within said loadlock chamber about a single pivot axis. The apparatus is adapted to carry two wafers, one unprocessed and one processed, simultaneously between the loadlock chamber and the process chamber. A method utilizing the disclosed system is also provided.
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Frank S Menagh from Santa Cruz, CA, age ~71 Get Report