Dinesh D Kuwar

150 Palm Valley Blvd, San Jose, CA 95123

Consumer Electronics

Emulex - San Jose since May 2013
Design and Verification Engineer (Consultant)
Calsoft Labs Inc since Mar 2013
Design Verification Engg
Intel India Technology Pvt Ltd - Bangalore 2006 - Mar 2013
Sr Design and Verification Engg
KPIT Cummins - Bangalore 2003 - 2006
Sernior Design/Verification
GDA Technologies 2003 - 2003
Sernior Design Engg

CDAC Pune
Doctor Babasaheb Ambedkar Marathwada University
Govt College of Engg Pune

Vlsi
Asic
Verilog
Vhdl
C
Debugging
Microprocessors
Rtl Design
Functional Verification
Systemverilog
Fpga
Processors
Soc
Specman
Semiconductors
Ic
Systemc
Pcie
Rtl Coding
Static Timing Analysis
Tcl
Modelsim
Open Verification Methodology
Application Specific Integrated Circuits
System on A Chip
Very Large Scale Integration
Field Programmable Gate Arrays
C++
Programming
Gpu Architecture
Computer Architecture

Orlando, FL