Inventors:
Archibald J. Allen - Grand Isle VT
Wilm E. Donath - New York NY
Alan D. Dziedzic - Newburgh NY
Mark A. Lavin - Katonah NY
Daniel N. Maynard - Craftsbury Common VT
Dennis M. Newns - Yorktown Heights NY
Gustavo E. Tellez - Essex Junction VT
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 1750
Abstract:
A method of computing a manufacturing yield of an integrated circuit having device shapes includes sub-dividing the integrated circuit into failure mechanism subdivisions (each of the failure mechanism subdivisions includes one or more failure mechanism and each of the failure mechanisms includes one or more defect mechanisms), partitioning the failure mechanism subdivisions by area into partitions, pre-processing the device shapes in each partition, computing an initial average number of faults for each of the failure mechanisms and for each partition by numerical integration of an average probability of failure of each failure mechanism, (the numerical integration produces a list of defect sizes for each defect mechanism, and the computing of the initial average includes setting a maximum integration error limit, a maximum sample size for a population of each defect size, and a maximum number of allowable faults for each failure mechansim), and computing a final average number of faults for the integrated circuit by iterativelly reducing a statistical error of the initial average number of faults for each of the failure mechanisms until the statistical error is below an error limit.