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Daniel Robert Ullum

from San Jose, CA
Age ~67

Daniel Ullum Phones & Addresses

  • 834 Kyle St, San Jose, CA 95127 (408) 929-4919
  • Emeryville, CA
  • Sunnyvale, CA
  • Chatsworth, CA
  • Alameda, CA
  • 834 Kyle St, San Jose, CA 95127

Publications

Us Patents

Network Switch With Hash Table Look Up

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US Patent:
6457058, Sep 24, 2002
Filed:
Jul 12, 2001
Appl. No.:
09/904431
Inventors:
Daniel Ullum - San Jose CA
Thomas J. Edsall - Mountain View CA
Assignee:
Cisco Technology, Inc. - San Jose CA
International Classification:
G06F 15173
US Classification:
709238, 709245
Abstract:
An improved look up mechanism for accessing a RAM to obtain forwarding information for data frames being transported among ports of a high-performance switch is provided. The look up mechanism includes a multi-page look up table and associated hashing technique. A media access control (MAC) address and a virtual local area network (VLAN) identifier are transformed with a hash function to obtain a hash key. The hash key is an address pointing to a particular entry in the look up table. A virtual first page is also derived from the hash key, which selects a particular physical page of the look up table to be initially accessed each time that MAC address/VLAN pair is used. The look up mechanism may also be used to access a short cut table containing Layer short cut information. In either case, ultimately, the likelihood is increased that a match will be found on the first RAM access, thus maintaining high-speed switch performance.

Traffic Monitor Using Leaky Bucket With Variable Fill

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US Patent:
6567379, May 20, 2003
Filed:
Jun 9, 1999
Appl. No.:
09/328702
Inventors:
David S. Walker - San Jose CA
Daniel R. Ullum - San Jose CA
Assignee:
Cisco Technology, Inc. - San Jose CA
International Classification:
G01R 3108
US Classification:
3702351, 370389, 370428, 37039532
Abstract:
An integrated circuit monitors the most active traffic flow rates on a communications network by using a leaky bucket model having a variable fill rate. As a switch receives packets, the packet identifications are sampled. A sampled packet identification is compared to record identifications in a table of identifications. If the sampled and record identifications match, an activity value for the packet identification is increased by an amount inversely proportional to an activity value associated with the record identification. If the sampled and record identifications do not match, the activity value is decreased. Record identifications are removed from the table when the activity value decreases to a specified level. New sampled identifications are added to the table if empty records exist.

Method And Apparatus For Performing High-Speed Traffic Shaping

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US Patent:
6950400, Sep 27, 2005
Filed:
Jun 12, 2001
Appl. No.:
09/879553
Inventors:
Christina H. Tran - San Jose CA, US
Daniel R. Ullum - San Jose CA, US
Yichou Lin - San Jose CA, US
Yan-ming Chen - Fremont CA, US
Silvano Gai - San Jose CA, US
Thomas J. Edsall - Cupertino CA, US
Assignee:
Cisco Technology, Inc. - San Jose CA
International Classification:
H04L012/26
US Classification:
370236, 3703954
Abstract:
A network traffic shaper provides high-speed, multi-level shaping. The traffic shaper is in communicating relationship with a forwarding engine, and includes a queue controller having a plurality of queues for storing messages, a scheduler for computing release times, at least one time-searchable memory and a corresponding memory controller. Each queue is preferably associated with a corresponding traffic specifier, and a release time is computed for each queue and stored in the time-searchable memory. When a stored release time expires, the message at the head of the corresponding queue is retrieved and is either moved into a different queue or forwarded by the network device. By moving messages through two or more queues, each having its own release time computed in response to a different traffic specifier, the traffic shaper can perform multi-level shaping on network messages.

Traffic Monitor Using Leaky Bucket With Variable Fill

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US Patent:
7050435, May 23, 2006
Filed:
Mar 4, 2003
Appl. No.:
10/379064
Inventors:
David S. Walker - San Jose CA, US
Daniel R. Ullum - San Jose CA, US
Assignee:
Cisco Technology, Inc. - San Jose CA
International Classification:
H04L 12/28
US Classification:
370392, 370396, 370412
Abstract:
An integrated circuit monitors the most active traffic flow rates on a communications network by using a leaky bucket model having a variable fill rate. As a switch receives packets, the packet identifications are sampled. A sampled packet identification is compared to record identifications in a table of identifications. If the sampled and record identifications match, an activity value for the packet identification is increased by an amount inversely proportional to an activity value associated with the record identification. If the sampled and record identifications do not match, the activity value is decreased. Record identifications are removed from the table when the activity value decreases to a specified level. New sampled identifications are added to the table if empty records exist.

Traffic Monitor Using Leaky Bucket With Variable Fill

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US Patent:
7787464, Aug 31, 2010
Filed:
May 23, 2006
Appl. No.:
11/438857
Inventors:
David S. Walker - San Jose CA, US
Daniel R. Ullum - San Jose CA, US
Assignee:
Cisco Technology, Inc. - San Jose CA
International Classification:
H04L 12/28
US Classification:
370392, 37039531
Abstract:
An integrated circuit monitors the most active traffic flow rates on a communications network by using a leaky bucket model having a variable fill rate. As a switch receives packets, the packet identifications are sampled. A sampled packet identification is compared to record identifications in a table of identifications. If the sampled and record identifications match, an activity value for the packet identification is increased by an amount inversely proportional to an activity value associated with the record identification. If the sampled and record identifications do not match, the activity value is decreased. Record identifications are removed from the table when the activity value decreases to a specified level. New sampled identifications are added to the table if empty records exist.

Look Up Mechanism And Associated Hash Table For A Network Switch

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US Patent:
6266705, Jul 24, 2001
Filed:
Sep 29, 1998
Appl. No.:
9/162730
Inventors:
Daniel Ullum - San Jose CA
Thomas J. Edsall - Mountain View CA
Assignee:
Cisco Systems, Inc. - San Jose CA
International Classification:
G06F 15173
US Classification:
709238
Abstract:
An improved look up mechanism for accessing a RAM to obtain forwarding information for data frames being transported among ports of a high-performance switch is provided. The look up mechanism includes a multi-page look up table and associated hashing technique. A media access control (MAC) address and a virtual local area network (VLAN) identifier are transformed with a hash function to obtain a hash key. The hash key is an address pointing to a particular entry in the look up table. A virtual first page is also derived from the hash key, which selects a particular physical page of the look up table to be initially accessed each time that MAC address/VLAN pair is used. The look up mechanism may also be used to access a short cut table containing Layer 3 short cut information. In either case, ultimately, the likelihood is increased that a match will be found on the first RAM access, thus maintaining high-speed switch performance.

Output Pin For Selectively Outputting One Of A Plurality Of Signals Internal To A Semiconductor Chip According To A Programmable Register For Diagnostics

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US Patent:
57176957, Feb 10, 1998
Filed:
Dec 4, 1995
Appl. No.:
8/566900
Inventors:
Philip R. Manela - San Mateo CA
Peter R. Birch - San Francisco CA
John C. Lin - Cupertino CA
Daniel R. Ullum - San Jose CA
Assignee:
Silicon Graphics, Inc. - Mountain View CA
International Classification:
G11C 2900
G01R 3128
H03K 19003
US Classification:
371 211
Abstract:
A method of gaining access to multiple signals internal to a semiconductor chip while minimizing the number of pins dedicated for diagnostic and testing purposes. A chip designer determines which internal signals would most likely be helpful in troubleshooting and debugging a new chip design. These signals are input to a selector. A configuration register is loaded with information specifying which ones of these signals is to be routed to the output pin(s) so that they can be monitored externally by a logic analyzer in real-time. The selector only routes the currently designated signals to the appropriate output pin(s). Subsequently, a different set of signals can be selectively routed to the output pin(s) in place of the originally chosen signals.
Daniel Robert Ullum from San Jose, CA, age ~67 Get Report