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Daniel P Labzentis

from Owego, NY
Age ~65

Daniel Labzentis Phones & Addresses

  • Owego, NY
  • 2508 North St, Endicott, NY 13760 (607) 785-2799
  • Painted Post, NY
  • Binghamton, NY
  • 628 Mcfadden Rd, Apalachin, NY 13732 (607) 625-5065
  • Montrose, PA
  • 628 Mcfadden Rd, Apalachin, NY 13732 (607) 226-1637

Work

Position: Professional/Technical

Education

Degree: Graduate or professional degree

Publications

Us Patents

Method Of Producing Flex Circuit With Selectively Plated Gold

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US Patent:
6383401, May 7, 2002
Filed:
Jun 30, 2000
Appl. No.:
09/607978
Inventors:
Daniel P. Labzentis - Apalachin NY
Francesco F. Marconi - Hallstead PA
Allan R. Knoll - Endicott NY
David J. Bajkowski - Hallstead PA
Assignee:
International Flex Technologies, Inc. - Endicott NY
International Classification:
H01B 1300
US Classification:
216 13, 437618, 438182, 156630
Abstract:
Disclosed is a method of producing a flexible circuit board having gold selectively plated on only desired elements of the conductive circuits. These desired elements typically are attachment sites, such as wire bond pads or ball grid array pads, for semiconductor chips. This method eliminates the requirement to buss all circuits to a common plating contact by using a background seed metal for plating continuity. This method also provides a means to alleviate the requirement for precise registration or alignment when multiple photoresist layers are employed in order to selectively plate only a portion of the metallic elements present on the flexible circuit board. The defect of resist lifting followed by nickel/gold underplating is eliminated by conditioning the intermediate photoresist to survive the nickel/gold plating bath.

Method Of Producing Flex Circuit With Selectively Plated Gold

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US Patent:
6515233, Feb 4, 2003
Filed:
Jun 30, 2000
Appl. No.:
09/607977
Inventors:
Daniel P. Labzentis - Apalachin NY, 13732
Francesco F. Marconi - Hallstead PA, 18822
Allan R. Knoll - Endicott NY, 13760
David J. Bajkowski - Hallstead PA, 18822
International Classification:
H05K 100
US Classification:
174254, 174261, 174255, 174256, 361749, 361779, 29846, 29825, 29839
Abstract:
Disclosed is a method of producing a flexible circuit board having gold selectively plated on only desired elements of the conductive circuits. These desired elements typically are attachment sites, such as wire bond pads or ball grid array pads, for semiconductor chips. This method eliminates the requirement to buss all circuits to a common plating contact by using a background seed metal for plating continuity. This method also provides a means to alleviate the requirement for precise registration or alignment when multiple photoresist layers are employed in order to selectively plate only a portion of the metallic elements present on the flexible circuit board. The defect of resist lifting followed by nickel/gold underplating is eliminated by conditioning the intermediate photoresist to survive the nickel/gold plating bath.

Method Of Making A Circuitized Substrate

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US Patent:
57664994, Jun 16, 1998
Filed:
Apr 26, 1996
Appl. No.:
8/638251
Inventors:
Kim Joseph Blackwell - Owego NY
Daniel Peter Labzentis - Endicott NY
Jonathan David Reid - Johnson City NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 2102
US Classification:
216 96
Abstract:
A method of making a circuitized substrate wherein a dielectric layer is provided having a first layer of metallic material thereon. A first metallic member is formed on the dielectric's metallic layer, following which a pair of openings are precisely provided within a second dielectric material located on the dielectric. These openings in turn define a selected area on the first metallic member and, significantly, a precisely oriented pattern of the first metallic layer at a spaced distance from the metallic member. This metallic pattern serves as a mask to permit formation of an opening through the dielectric, which opening in turn may be engaged by tooling or the like such as may be used to position an electronic component, e. g. , semiconductor device, on the underlying substrate. The invention thus assures precise orientation and placement of components such as semiconductor devices on highly dense circuit patterns such as those required in the present art in the manufacture of devices such as those of the information handling system (computer) variety.

Circuitized Substrate With Material Containment Means And Method Of Making Same

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US Patent:
57315477, Mar 24, 1998
Filed:
Feb 20, 1996
Appl. No.:
8/603629
Inventors:
Mark Daniel Derwin - Binghamton NY
Daniel Peter Labzentis - Endicott NY
Jonathan David Reid - Johnson City NY
Timothy Lee Sharp - Berkshire NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H05K 109
US Classification:
174251
Abstract:
A circuitized substrate having conductive circuitry thereon and a barrier located adjacent at least portions of the circuitry to serve as an effective constraint for liquid material (e. g. , encapsulant) applied to cover and protect the circuitry. The barrier can be formed concurrently with circuitry formation and formed of materials (e. g. , copper, nickel, gold) similar to those used for the circuitry. The barrier is of two-part construction and of a particular shape wherein one part affords a greater surface tension than the other such that the material may actually lie on one part while being prevented from engagement with the other. Providing such dual (or "progressive") surface tensions successfully constrains the liquid material at least until solidification thereof occurs.

Method Of Forming An Electrical Connection Between A Conductive Member Having A Dual Thickness Substrate And A Conductor And Electronic Package Including Said Connection

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US Patent:
62814370, Aug 28, 2001
Filed:
Nov 10, 1999
Appl. No.:
9/437506
Inventors:
Steven W. Anderson - Newark Valley NY
Gregg J. Armezzani - Endwell NY
Daniel P. Labzentis - Apalachin NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 2302
US Classification:
174 524
Abstract:
An electrical connection between a flexible circuitized substrate and a separator conductor is formed wherein the substrate's dielectric member has a region of reduced thickness immediately adjacent the portion of the substrate's conductor that is being connected (e. g. , using thermocompression bonding) to the separate conductor (e. g. , a chip's contact site or a solder ball thereon). Heat and pressure is applied to form the bond between both conductors, this heat passing through the reduced thickness dielectric while appropriate pressure is applied. The reduced thickness assures heat flow (and possibly displacement of the dielectric in this region, e. g. , it "melts back") to thus facilitate bond formation, but also is able to positively retain several conductors of the substrate in spaced alignment during the bonding to respective solder balls or chip contact sites.
Daniel P Labzentis from Owego, NY, age ~65 Get Report