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Daniel Yves Abramovitch

from Palo Alto, CA
Age ~62
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Also known as:
Daniel Y Abramovitch, Daniel Alters Susan Abramovitch, Daniel Y Alters, Dan Abramovitch
Phone and address:
3372 Kipling St, Palo Alto, CA 94306
(650) 856-1127
Related to:
Michael Aaron Abramovitch, 27Susan E Alters, 61
Connected to:
Adam M Abramovitz, 51Alexander Abramovich, 46Alina L Abramov, 38Amnon Abramov, 32Anatoli A Abramov, 63Andrew W Abramowicz, 58Angelique Abramowicz, 34Anja A Abramowitz, 89Anna Abramova, 37Arsen Abramov, 33

Daniel Abramovitch Phones & Addresses

  • 3372 Kipling St, Palo Alto, CA 94306 (650) 856-1127 (650) 856-2364
  • East Palo Alto, CA
  • Santa Clara, CA

Work

Company: Agilent technologies 2000 Position: Principal project engineer

Education

School / High School: Stanford University 1984 to 1988

Skills

Filters • Linux • Algorithms • Jitter • Systems Engineering • Instrument Control • C • Real Time Control • Windows • Controllers • Perl • Matlab • Instrumentation • Sensors • Sdh • System Design • Modeling • Automation • Pll • Microscopes • Engineering • Signal Processing • Html • Programming • Agilent • System Identification • Embedded Systems • Xml • Fpga • Electrical Engineering • Vhdl • Kalman Filtering • Scientific Software • C++ • Storage • Simulation • Gpib • Dsp • Industrial Automation • Software Engineering • Control Theory • Ieee • Dynamical Systems • Optimal Control • Optimization • Automatic Control • Computer Arithmetic • Software Development • Simulink • Real Time Programming • R&D • Control Systems • Data Acquisition • Analysis

Languages

French • Spanish

Industries

Biotechnology

Resumes

Resumes

Daniel Abramovitch Photo 1

System Architect

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Location:
Cupertino, CA
Industry:
Biotechnology
Work:
Agilent Technologies since 2000
Principal Project Engineer
Agilent Labs since Apr 2000
Principal Project Engineer
IEEE Control Systems Society since 1988
Senior Member
HP Labs 1988 - 2000
Member of the Technical Staff
Hewlett Packard Labs Oct 1988 - Mar 2000
Member of the Technical Staff
Education:
Stanford University 1984 - 1988
Stanford University 1983 - 1984
Clemson University 1979 - 1983
Tuscaloosa High School 1975 - 1979
Skills:
Filters
Linux
Algorithms
Jitter
Systems Engineering
Instrument Control
C
Real Time Control
Windows
Controllers
Perl
Matlab
Instrumentation
Sensors
Sdh
System Design
Modeling
Automation
Pll
Microscopes
Engineering
Signal Processing
Html
Programming
Agilent
System Identification
Embedded Systems
Xml
Fpga
Electrical Engineering
Vhdl
Kalman Filtering
Scientific Software
C++
Storage
Simulation
Gpib
Dsp
Industrial Automation
Software Engineering
Control Theory
Ieee
Dynamical Systems
Optimal Control
Optimization
Automatic Control
Computer Arithmetic
Software Development
Simulink
Real Time Programming
R&D
Control Systems
Data Acquisition
Analysis
Languages:
French
Spanish

Business Records

Name / Title
Company / Classification
Phones & Addresses
Daniel Abramovitch
Principal
Alters Bioscience Consulting
Business Consulting Services
3372 Kipling St, Palo Alto, CA 94306

Publications

Us Patents

Missing Pulse Detector Using Synchronous Detection

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US Patent:
6393596, May 21, 2002
Filed:
Oct 30, 1998
Appl. No.:
09/183832
Inventors:
Michael C. Fischer - Palo Alto CA
Josh Hogan - Los Altos CA
Terril Hurst - Fremont CA
Daniel Y. Abramovitch - Palo Alto CA
Carl Taussig - Woodside CA
Assignee:
Hewlett-Packard Company - Palo Alto CA
International Classification:
G11C 2900
US Classification:
714769, 327 18, 327 20, 327551, 386 22
Abstract:
A data decoder for decoding digital data in a high frequency signal in an optical storage device. A carrier signal derived from the high frequency passed through a zonal bandpass filter and a limiter is multiplied by the high frequency signal passed through a high pass filter. The resulting product is filtered and passed through a comparator forming a digital data stream.

Harmonic Correction In Phase-Locked Loops

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US Patent:
6646964, Nov 11, 2003
Filed:
Mar 27, 2000
Appl. No.:
09/536298
Inventors:
Daniel Y. Abramovitch - Palo Alto CA
Michael C. Fischer - Palo Alto CA
Joshua N. Hogan - Los Altos CA
Carl P. Taussig - Redwood City CA
Assignee:
Hewlett-Packard Development Company, L.P. - Houston TX
International Classification:
G11B 700
US Classification:
369 4725, 36912411
Abstract:
Correction for harmonic disturbances on rotating storage media in a phase-locked loop. The effects of harmonic disturbances in a phase-locked loop are reduced by employing harmonic correction. Harmonic correction may be present in the loop at all times, or may be switched in once the loop has achieved phase lock. Disturbance within the loop bandwidth is corrected using additional integrating pole or a bump (resonant) filter. Disturbance outside the loop bandwidth is corrected using low pass or a notch (anti-resonant) filter. Alternately, a canceling signal may be generated and added as a feedforward signal. A repetitive control scheme uses a filtered version of the residual errors on previous media rotations as a feedforward signal to cancel harmonic effects.

Intelligent Test Point Selection For Bit Error Rate Tester-Based Diagrams

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US Patent:
6745148, Jun 1, 2004
Filed:
Jun 3, 2002
Appl. No.:
10/162405
Inventors:
Daniel Yves Abramovitch - Palo Alto CA
Assignee:
Agilent Technologies, Inc. - Palo Alto CA
International Classification:
G06M 1104
US Classification:
702127, 702 65
Abstract:
Method and apparatus for constructing diagrams representing the relationship between variable quantities. According to the method, at least one first measurement point representing the relationship between the variable quantities is provided for initially constructing the diagram. Thereafter, at least one location is selected at which the relationship between the variable quantities is to be measured, the at least one location being selected as a function of the at least one measurement point. The relationship between the variable quantities is then measured at the at least one location to provide at least one additional measurement point for further constructing the diagram. The invention permits diagrams, such as V Curve diagrams, Bathtub Curve diagrams and Eye Diagrams, to be constructed in less time and using fewer measurement points than conventional diagram construction procedures.

Harmonic Correction In Phase-Locked Loops

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US Patent:
6928036, Aug 9, 2005
Filed:
Oct 30, 2003
Appl. No.:
10/696993
Inventors:
Daniel Y. Abramovitch - Palo Alto CA, US
Michael C. Fischer - Palo Alto CA, US
Joshua N. Hogan - Los Altos CA, US
Carl P. Taussig - Redwood City CA, US
Assignee:
Hewlett-Packard Development Company, L.P. - Houston TX
International Classification:
G11B007/00
US Classification:
369 4725, 36912411
Abstract:
Correction for harmonic disturbances on rotating storage media in a phase-locked loop. The effects of harmonic disturbances in a phase-locked loop are reduced by employing harmonic correction. Harmonic correction may be present in the loop at all times, or may be switched in once the loop has achieved phase lock. Disturbance within the loop bandwidth is corrected using additional integrating pole or a bump (resonant) filter. Disturbance outside the loop bandwidth is corrected using low pass or a notch (anti-resonant) filter. Alternately, a canceling signal may be generated and added as a feedforward signal. A repetitive control scheme uses a filtered version of the residual errors on previous media rotations as a feedforward signal to cancel harmonic effects.

Identifying And Synchronizing Permuted Channels In A Parallel Channel Bit Error Rate Tester

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US Patent:
6961317, Nov 1, 2005
Filed:
Sep 28, 2001
Appl. No.:
09/967780
Inventors:
Daniel Y. Abramovitch - Palo Alto CA, US
Michael J. Weinstein - Los Altos CA, US
Heinz R. Plitschka - Harrenbaerg, DE
Assignee:
Agilent Technologies, Inc. - Palo Alto CA
International Classification:
H04J001/20
US Classification:
370252
Abstract:
A test system that includes a generator and an analyzer acting cooperatively to test a device having a plurality of device communication channels. The device has a plurality of inputs and corresponding outputs, each input being connected to a corresponding one of the outputs. The correspondence between the input and output channels may change if the device is turned off and on or if the device is not actively sending data from the inputs to the outputs. The test system determines a mapping between the device inputs and outputs prior to performing bit error rate testing utilizing a mapping test pattern. The test system can then switch to a bit error rate test pattern without causing the device to drift such that the correspondence between the input and output channels is lost.

Method Of And System For Constructing Valid Data For Memory-Based Tests

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US Patent:
6973599, Dec 6, 2005
Filed:
Sep 28, 2001
Appl. No.:
09/967287
Inventors:
Daniel Y. Abramovitch - Palo Alto CA, US
Assignee:
Agilent Technologies, Inc. - Palo Alto CA
International Classification:
G06F011/00
US Classification:
714704, 714800
Abstract:
Bit-error-rate (BER) testing includes a data pattern generator transmitting a known data pattern to a device under test (DUT), which processes the data pattern and outputs the processed data pattern to an error analyzer. BER testing of telecommunications systems often uses data patterns in the form of SONET or SDH frames, which have error-checking bytes known as B bytes. The B Bytes computed for a given SONET or SDH frame are inserted into a next SONET or SDH frame. In memory-based BER tests, a fixed number of SONET or SDH frames is input to the DUT by the pattern generator. The last frame of the data pattern is adjusted so that the B bytes calculated using the last frame match the B bytes present in the first frame, which approach avoids parity errors that can occur in response to B byte mismatches between the last and the first frame.

Apparatus For Monitoring Tire Pressure

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US Patent:
7321840, Jan 22, 2008
Filed:
Jun 6, 2005
Appl. No.:
11/146672
Inventors:
Daniel Yves Abramovitch - Palo Alto CA, US
Assignee:
Avago Technologies General IP Pte. Ltd. - Singapore
International Classification:
G01L 17/00
G06F 15/00
US Classification:
702138
Abstract:
A tire monitor and a tire pressure gauge for reading the data from the tire monitor are disclosed. The tire monitor includes an in-tire controller that stores a target inflation pressure representing the pressure to which the tire should be inflated when the tire is at a standard temperature. The tire monitor transmits the target inflation pressure to the external processor when the external processor is connected to the in-tire monitor over a communication link. A sensor array in the tire monitor can provide pressure and temperature readings that are stored in the monitor and used to provide a temperature-compensated fill pressure for the tire. The tire pressure gauge provides the user with a fill pressure to be used in inflating the tire. The tire pressure gauge communicates with the tire monitor and obtains pressure and temperature readings stored in the tire monitor. These reading are used to provide the temperature-compensated fill pressure.

Nano Position Sensing And Surface Estimation In Scanning Probe Microscopes Using Reference Estimation

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US Patent:
7401502, Jul 22, 2008
Filed:
Sep 28, 2006
Appl. No.:
11/536501
Inventors:
Daniel Y Abramovitch - Palo Alto CA, US
Assignee:
Agilent Technologies, Inc. - Santa Clara CA
International Classification:
G01B 5/28
G02B 6/26
US Classification:
73105
Abstract:
A substitute reference signal input is incorporated into a state space controller for a scanning probe microscope to improve tracking efficiency.
Control profile
Daniel Yves Abramovitch from Palo Alto, CA, age ~62 Get Report