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Cormac Conroy Phones & Addresses

  • 2164 Webster St, Palo Alto, CA 94301
  • Chico, CA
  • 555 Hacienda Ave, Campbell, CA 95008 (408) 871-8863 (408) 370-2146
  • 555 W Hacienda Ave #205, Campbell, CA 95008 (408) 871-8863
  • 655 Fair Oaks Ave, Sunnyvale, CA 94086 (408) 739-8909
  • 655 S Fair Oaks Ave #J208, Sunnyvale, CA 94086 (408) 739-8909
  • 3400 Avenue Of The Arts #A109, Costa Mesa, CA 92626
  • Santa Clara, CA
  • San Jose, CA

Publications

Us Patents

Multiplexed Codec For An Adsl System

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US Patent:
6459684, Oct 1, 2002
Filed:
Feb 16, 1999
Appl. No.:
09/250426
Inventors:
Cormac S. Conroy - Sunnyvale CA
Samuel W. Sheng - Santa Clara CA
Gregory T. Uehara - Honolulu HI
Assignee:
LSI Logic Corporation - Milpitas CA
International Classification:
H04B 320
US Classification:
370286, 370494, 370208, 379410
Abstract:
An ADSL central office transmission system for transmitting downstream DMT signals to a plurality of remote ADSL transceiver is disclosed. The system includes a DMT digital signal transceiver that generates a time division multiplexed digital signal that includes a plurality of DMT signals to be sent on a plurality of ADSL lines. A digital to analog converter converts the time division multiplexed digital signal into a time division multiplexed analog signal that includes a plurality of analog DMT signals. The analog to digital converter has an output that outputs the time division multiplexed analog signal. A switch selectively connects the output of the digital to analog converter to each of a plurality of transmitters. The transmitters are configured to drive the plurality of ADSL lines. Thus, the plurality ADSL lines are driven by the plurality of analog DMT signals.

Dynamic Supply Control For Line Driver

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US Patent:
6498521, Dec 24, 2002
Filed:
Nov 29, 2001
Appl. No.:
09/998671
Inventors:
Ara Bicakci - San Jose CA
Sang-Soo Lee - Cupertino CA
Cormac S. Conroy - Sunnyvale CA
Assignee:
LSI Logic Corporation - Milpitas CA
International Classification:
H03B 100
US Classification:
327110, 327309
Abstract:
A dynamic supply control circuit is provided for a line driver. The line driver has an amplification factor G, receives an input signal voltage, and drives a transmission line having a load R via a transformer having a turns ratio of 1:n. The circuit includes an input node for receiving an input signal voltage, a supply node for supplying a driving voltage to the line driver, a lift diode coupled between a fixed supply voltage and the supply node, a lift capacitor coupled between the supply node and an output node, and a lift amplifier having the amplification factor G coupled between the input node and the output node. The lift amplifier drives the lift capacitor when the input signal voltage is greater than an input threshold voltage, the input threshold voltage having a value greater than a common mode voltage of the input signal voltage.

Amplifier And Line Driver For Broadband Communications

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US Patent:
6724219, Apr 20, 2004
Filed:
Jun 15, 2001
Appl. No.:
09/882499
Inventors:
Ara Bicakci - San Jose CA
Cormac S. Conroy - Sunnyvale CA
Sang-Soo Lee - Cupertino CA
Assignee:
LSI Logic Corporation - Milpitas CA
International Classification:
H04B 303
US Classification:
326 30, 375257, 375258, 333117, 333120
Abstract:
A line driver for coupling a data transceiver to a transmission line having a load impedance via a transformer with a turns ratio of 1:n includes an input port for receiving an input signal voltage from the data transceiver, an output port for supplying an output signal voltage to the transformer, and an amplifier circuit for amplifying the input signal voltage. The amplifier circuit includes a first output stage, a second output stage coupled to the output port, an output resistor coupled to the first output stage, a feedback path from the first output stage to an input of the amplifier circuit, and a line matching network coupled between the first output stage and the second output stage, for compensating variations in the load impedance, so that a synthesized output impedance of the line driver substantially matches an actual load impedance Z of the transmission line.

Frequency Synthesizer With On-Chip Inductor

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US Patent:
6806779, Oct 19, 2004
Filed:
Dec 20, 2002
Appl. No.:
10/325478
Inventors:
Beomsup Kim - Cupertino CA
Cormac S. Conroy - Sunnyvale CA
Assignee:
Berkana Wireless, Inc. - Campbell CA
International Classification:
H03L 700
US Classification:
331 16, 331117 FE, 331177 R
Abstract:
A system and method are disclosed for generating a synthesized signal. A frequency synthesizer is used. The frequency synthesizer includes an input interface configured to receive an input signal having a reference frequency; a phase locked loop (PLL) coupled to the input interface, having a fractional N configuration and comprises a voltage controlled oscillator; wherein the voltage controlled oscillator is configured to generate the synthesized signal; and the voltage controlled oscillator includes an on-chip inductor.

Discretely Variable Capacitor For Voltage Controlled Oscillator Tuning

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US Patent:
6836193, Dec 28, 2004
Filed:
Dec 20, 2002
Appl. No.:
10/325504
Inventors:
Beomsup Kim - Cupertino CA
Cormac S. Conroy - Sunnyvale CA
Assignee:
Berkana Wireless, Inc. - Campbell CA
International Classification:
H03B 508
US Classification:
331179, 331 16, 331 36 C, 331177 V
Abstract:
A system and method are disclosed for generating a variable frequency output. A voltage controlled oscillator (VCO) is used. The VCO comprises a plurality of aggregate capacitor circuits, wherein each of the aggregate capacitor circuits has a collective capacitance, at least two of the collective capacitances have different values, and each of the aggregate capacitor circuits includes one or more individual capacitors wherein each of the individual capacitors are substantially the same size. The VCO further comprises a plurality of switches configured to select one or more aggregate capacitor circuits from among the plurality of aggregate capacitor circuits to form a discretely variable capacitor network having a discretely variable capacitance, wherein the discretely variable capacitor network is configured to cause an oscillator to generate a variable frequency as a result of the discretely variable capacitance.

Line Interface, Apparatus And Method For Coupling Transceiver And Transmission Line

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US Patent:
6870928, Mar 22, 2005
Filed:
May 25, 2001
Appl. No.:
09/866525
Inventors:
Cormac S. Conroy - Sunnyvale CA, US
Samuel W. Sheng - San Jose CA, US
Ara Bicakci - San Jose CA, US
John DeCelles - Campbell CA, US
Sang-Soo Lee - Cupertino CA, US
Assignee:
LSI Logic Corporation - Milpitas CA
International Classification:
H04M001/00
US Classification:
37939901, 379391, 379392, 379402
Abstract:
A line interface couples signals between a data transceiver and a transmission line having a load impedance Z. The line interface includes a transformer, a driver circuit for supplying a transmit signal from the data transceiver to the transformer, and a receiver circuit for receiving a receive signal from the transformer. The transformer includes a first port coupled to the transmission line, a second port coupled to the driver circuit, a third port coupled to the receiver circuit, a first winding part having a turns ratio of 1: n, where n>1, for coupling the transmit signal from the second port to the first port, and a second winding part having a turns ratio of 1: m, where m

Line Driver For Asymmetric Digital Subscriber Line System

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US Patent:
6970515, Nov 29, 2005
Filed:
Jun 8, 2001
Appl. No.:
09/878142
Inventors:
Ara Bicakci - San Jose CA, US
Cormac S. Conroy - Sunnyvale CA, US
Assignee:
LSI Logic Corporation - Milpitas CA
International Classification:
H04B003/00
US Classification:
375257, 375219, 375220, 375258, 370321, 370470
Abstract:
A line driver couples a data transceiver to a transmission line having a load impedance Z via a transformer with a turns ratio of 1:n, the data transceiver transmitting signals in a first frequency range and receiving signals in a second frequency range different from the first frequency range. The line driver includes an input port for receiving an input signal voltage, an output port for supplying an output signal voltage to the transformer, and a differential amplifier having a low pass filter for amplifying the input signal voltage and outputting an amplified signal voltage. The line driver further includes termination resistors having a resistance R, where and a positive feedback path for coupling the output signal voltage from the output port to an appropriate node of the differential amplifier so that a synthesized output impedance substantially matches the load impedance Z over the second frequency range.

Complex Multiple Feedback Filter

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US Patent:
6976051, Dec 13, 2005
Filed:
Nov 14, 2001
Appl. No.:
10/003724
Inventors:
Ozan E. Erdogan - Campbell CA, US
Cormac Conroy - Sunnyvale CA, US
Assignee:
Berkana Wireless Inc. - Campbell CA
International Classification:
G06G007/02
US Classification:
708819
Abstract:
A complex filter includes an I channel having a first I channel output and a second I channel output and a Q channel having a first Q channel output and a second Q channel output. The second I channel output is input to the Q channel through a first passive network and wherein the second Q channel output is input to the I channel through a second passive network.
Cormac S Conroy from Palo Alto, CA, age ~60 Get Report