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Chuang Zhang Phones & Addresses

  • San Diego, CA
  • Berthoud, CO
  • Windsor, CO
  • Johnstown, CO
  • Baton Rouge, LA
  • Eagan, MN
  • Allen, TX
  • Colton, TX
  • Plano, TX
  • Los Angeles, CA
  • 13550 Russet Leaf Ln, San Diego, CA 92129

Resumes

Resumes

Chuang Zhang Photo 1

Technician Lead

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Location:
3361 Iowa St, Baton Rouge, LA 70802
Industry:
Semiconductors
Work:
Bytedance
Technician Lead

Qualcomm Oct 2011 - Sep 2015
Senior Staff Engineer and Team Lead Analog Ic Designer

Broadcom Oct 2011 - Sep 2015
Senior Principal Scientist\Â Engineer - Analog Design

Lsi Corporation Apr 2007 - Oct 2011
Staff Analog Designer

Micron Technology May 2004 - Jan 2007
Analog Ic Design
Education:
Louisiana State University 2000 - 2004
Doctorates, Doctor of Philosophy, Electrical Engineering
University of Southern California 1998 - 2000
Master of Science, Masters
Tsinghua University 1993 - 1997
Bachelors, Bachelor of Science, Physics
Skills:
Analog
Cmos
Ic
Integrated Circuit Design
Power Management
Analog Circuit Design
Embedded Systems
Mixed Signal
Asic
Sensors
Lna
Cadence Virtuoso
Semiconductors
Circuit Design
Soc
Spectre
Amplifiers
Ldo
Circuits
Languages:
Mandarin
Chuang Zhang Photo 2

Chuang Zhang

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Chuang Zhang Photo 3

Chuang Zhang

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Publications

Us Patents

Circuits And Methods Providing Dead Time Adjustment At A Synchronous Buck Converter

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US Patent:
20160118893, Apr 28, 2016
Filed:
Oct 21, 2015
Appl. No.:
14/918893
Inventors:
- San Diego CA, US
Farsheed Mahmoudi - San Diego CA, US
Chuang Zhang - Fort Collins CO, US
Zhengming Fu - San Diego CA, US
Sassan Shahrokhinia - San Diego CA, US
International Classification:
H02M 3/158
Abstract:
An apparatus and method are disclosed for efficiently using power at a voltage regulator, such as a synchronous buck converter. The synchronous buck converter includes a first switch and a second switch operated by a first control signal and a second control signal, respectively, where the first and second control signals have a corresponding phase difference. A logic circuit measures a duty cycle of an input pulse width modulated (PWM) signal against iterative changes of the phase difference between the first control signal and the second control signal. The logic circuit selects a phase difference corresponding to a minimum value of the PWM signal, thereby optimizing dead time at the synchronous buck converter. The logic circuit may include a Digital Pulse Width Modulator.

Circuits And Methods Providing High Efficiency Over A Wide Range Of Load Values

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US Patent:
20160118895, Apr 28, 2016
Filed:
Sep 23, 2015
Appl. No.:
14/863269
Inventors:
- San Diego CA, US
James Thomas Doyle - Carlsbad CA, US
Chuang Zhang - San Diego CA, US
Zhengming Fu - San Diego CA, US
International Classification:
H02M 3/158
G06F 1/32
Abstract:
An apparatus and method are disclosed for providing efficient operation in a feedback loop having a synchronous buck converter. The synchronous buck converter includes a plurality of individually selectable phases, where each of the phases has a plurality of individually selectable and parallel switching legs. The circuit stores information that associates multiple different load values with respective configuration settings that each define a number of phases and a number of switching legs. As the load changes, the circuit measures the load and selects an appropriate configuration setting. The circuit applies the selected configuration setting to operate the number of phases and a number of parallel switching legs in the buck converter.

Low Power High Resolution Oscillator Based Voltage Sensor

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US Patent:
20160047847, Feb 18, 2016
Filed:
Aug 13, 2014
Appl. No.:
14/459208
Inventors:
- San Diego CA, US
Chuang Zhang - San Diego CA, US
Yuancheng Christopher Pan - Saratoga CA, US
Nan Chen - San Diego CA, US
International Classification:
G01R 19/00
G01R 23/02
G01R 31/28
Abstract:
Systems and methods for sensing voltage on a chip are described herein. In one embodiment, a voltage sensor comprises a voltage-controlled oscillator coupled to a voltage being sensed, and a plurality of transition detectors, wherein each of the transition detectors is coupled to a different location on the oscillator, and wherein each of the transition detectors is configured to count a number of transitions at the respective location over a time period. The voltage sensor also comprises an adder configured to add the numbers of transitions from the transition detectors to generate an output value that is approximately proportional to the voltage.

Low Power Low Cost Temperature Sensor

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US Patent:
20150355033, Dec 10, 2015
Filed:
Jun 9, 2014
Appl. No.:
14/300110
Inventors:
- San Diego CA, US
Chuang Zhang - San Diego CA, US
Nan Chen - San Diego CA, US
International Classification:
G01K 7/01
G01K 13/00
Abstract:
Systems and methods for sensing temperature on a chip are described herein. In one embodiment, a temperature sensor comprises a first transistor having a gate, a second transistor having a gate coupled to the gate of the first transistor, and a bias circuit configured to bias the gates of the first and second transistors such that the first and second transistors operate in a sub-threshold region, and to generate a current proportional to a difference between a gate-to-source voltage of the first transistor and a gate-to-source voltage of the second transistor. The temperature sensor also comprises an analog-to-digital converter (ADC) configured to convert the current into a digital temperature reading
Chuang Zhang from San Diego, CA, age ~50 Get Report