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Brian Borrong Horng

from Irvine, CA
Age ~67

Brian Horng Phones & Addresses

  • 7 Garnet, Irvine, CA 92620
  • Mission Viejo, CA
  • Los Angeles, CA
  • Orange, CA

Resumes

Resumes

Brian Horng Photo 1

Senior Design Manager At Fairchild Semiconductor

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Location:
4990 Carr Ln southeast, Huntsville, AL 35803
Industry:
Semiconductors
Work:
Fairchild Semiconductor
Senior Design Manager at Fairchild Semiconductor
Education:
University of California, Los Angeles
Doctorates, Doctor of Philosophy, Electronics Engineering, Electronics
Brian Horng Photo 2

Senior Design Manager

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Location:
Irvine, CA
Industry:
Semiconductors
Work:
Fairchild Semiconductor, Southern California Development Center since Aug 2010
Senior Design Manager

Freescale Semiconductor, Inc Jan 2007 - Aug 2010
Design Manager, Analog Mixed-Signal And Power Division

Skyworks Solutions, Inc. 2005 - 2006
Senior Design Manager, Mixed-Signal Design

GlobespanVirata (Acquired by Conexant) 1999 - 2002
Design Manager, Analog LSI
Education:
University of California, Los Angeles 1984 - 1990
PhD, Electrical Engineering
Skills:
Mixed Signal
Analog
Ic
Soc
Power Management
Analog Circuit Design

Publications

Us Patents

Wide-Band Analog Front-End For Dsl Applications

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US Patent:
7061987, Jun 13, 2006
Filed:
Aug 6, 2002
Appl. No.:
10/214341
Inventors:
Nianxiong Tan - Laguna Niguel CA, US
Christian Eichrodt - Newport Beach CA, US
Brian Borrong Horng - Irvine CA, US
James J. Zhao - Tustin CA, US
Assignee:
Conexant, Inc. - Red Bank NJ
International Classification:
H04K 1/10
US Classification:
375260
Abstract:
An analog front-end circuit and method that supports multiple digital subscriber line (DSL) standards, including asymmetric digital subscriber line (ADSL) and very-high speed digital subscriber line (VDSL) is disclosed. The circuit incorporates multiple circuit blocks that can be selectively included into the transmit and receive paths of a DSL signal. It also permits selectable gain settings for signal amplifiers, and frequency bandwidth for signal filters that may be included in the transmit and receive paths. The receive path includes an analog-to-digital converter (ADC) that operates close to and exceeds the Nyquist sampling rate.

Led Driver With Dynamic Power Management

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US Patent:
7825610, Nov 2, 2010
Filed:
Mar 26, 2008
Appl. No.:
12/056237
Inventors:
Bin Zhao - Irvine CA, US
Jack W. Cornish - Foothill Ranch CA, US
Brian B. Horng - Irvine CA, US
Victor K. Lee - Irvine CA, US
Andrew M. Kameya - Irvine CA, US
Assignee:
Freescale Semiconductor, Inc. - Austin TX
International Classification:
H05B 37/02
US Classification:
315299, 315185 S, 315308, 315312, 315360
Abstract:
Power management in a light emitting diode (LED) system having a plurality of LED strings is disclosed. A voltage source provides an output voltage to drive the LED strings. An LED driver monitors the tail voltages of the active LED strings to identify the minimum, or lowest, tail voltage and adjusts the output voltage of the voltage source based on the lowest tail voltage. The LED driver can adjust the output voltage so as to maintain the lowest tail voltage at or near a predetermined threshold voltage so as to ensure that the output voltage is sufficient to properly drive each active LED string with a regulated current in view of pulse width modulation (PWM) performance requirements without excessive power consumption.

Led Driver With Feedback Calibration

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US Patent:
8035315, Oct 11, 2011
Filed:
Dec 22, 2008
Appl. No.:
12/340985
Inventors:
Bin Zhao - Irvine CA, US
Jack W. Cornish - Foothill Ranch CA, US
Brian B. Horng - Irvine CA, US
Andrew M. Kameya - Irvine CA, US
Jan Krellner - Chandler AZ, US
Kenneth C. Kwok - Irvine CA, US
Victor K. Lee - Irvine CA, US
Weizhuang W. Xin - Aliso Viejo CA, US
Assignee:
Freescale Semiconductor, Inc. - Austin TX
International Classification:
H05B 37/02
G09G 5/00
US Classification:
315299, 315308, 315312, 315360, 345204
Abstract:
Power management in a light emitting diode (LED) system having a plurality of LED strings is disclosed. A voltage source provides an output voltage to drive a plurality of LED strings. An LED driver implements a feedback mechanism to monitor the tail voltages of the active LED strings to identify the minimum tail voltage and adjust the output voltage of the voltage source based on the lowest tail voltage. A loop calibration module of the LED driver calibrates the feedback mechanism of the LED driver based on a relationship between a digital code value used to generate a particular output voltage and another digital code value generated based on the minimum tail voltage resulting from the particular output voltage.

Led Driver With Dynamic Headroom Control

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US Patent:
8049439, Nov 1, 2011
Filed:
Jan 30, 2009
Appl. No.:
12/363607
Inventors:
Bin Zhao - Irvine CA, US
Jack W. Cornish - Foothill Ranch CA, US
Brian B. Horng - Irvine CA, US
Victor K. Lee - Irvine CA, US
Andrew M. Kameya - Irvine CA, US
Assignee:
Freescale Semiconductor, Inc. - Austin TX
International Classification:
H05B 37/02
US Classification:
315297, 315307, 315308
Abstract:
A voltage source provides an output voltage to drive a plurality of light emitting diode (LED) strings. A LED driver adjusts the level of the output voltage so as to maintain the lowest tail voltage of the LED strings at or near a predetermined threshold voltage so as provide sufficient headroom voltages for current regulators for the LED strings. The LED driver operates in an operational mode and a calibration mode, which can be implemented in parallel with, or part of, the operational mode. During the calibration mode, the LED driver determines, for each LED string, a code value representative of the level of the output voltage necessary to maintain the tail voltage of the corresponding LED string at or near the predetermined threshold voltage. In the operational mode, the code values from the calibration mode are used to control the voltage source to provide an appropriate level for the output voltage.

Led Driver With Dynamic Power Management

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US Patent:
8106604, Jan 31, 2012
Filed:
Jul 16, 2009
Appl. No.:
12/504335
Inventors:
Bin Zhao - Irvine CA, US
Jack W. Cornish - Foothill Ranch CA, US
Brian B. Horng - Irvine CA, US
Andrew M. Kameya - Irvine CA, US
Kenneth C. Kwok - Irvine CA, US
Victor K. Lee - Irvine CA, US
Assignee:
Freescale Semiconductor, Inc. - Austin TX
International Classification:
H05B 37/02
US Classification:
315299, 315185 S, 315308, 315312, 315360
Abstract:
A light emitting diode (LED) system implements a LED driver to drive a set of one or more LED strings. The LED driver includes a voltage source to provide an adjustable output voltage to a head end of each LED string of the set for a first duration and a second duration following the first duration. The LED driver further includes a feedback controller to control the voltage source to adjust the output voltage for the second duration based on a digital code value generated from a minimum tail voltage of one or more tail voltages of the set at a sample point of the first duration. The LED driver further includes a power controller to temporarily enable one or more components of the feedback controller for a sample period of the first duration, the sample period comprising the sample point.

Led Driver With Segmented Dynamic Headroom Control

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US Patent:
8115414, Feb 14, 2012
Filed:
Jan 30, 2009
Appl. No.:
12/363179
Inventors:
Bin Zhao - Irvine CA, US
Jack W. Cornish - Foothill Ranch CA, US
Brian B. Horng - Irvine CA, US
Victor K. Lee - Irvine CA, US
Andrew M. Kameya - Irvine CA, US
Assignee:
Freescale Semiconductor, Inc. - Austin TX
International Classification:
H05B 37/02
US Classification:
315299, 315185 S, 315308, 315312, 315360
Abstract:
Techniques for dynamic headroom control in a light emitting diode (LED) system are disclosed. An output voltage is provided to drive a plurality of LED strings. A feedback controller monitors the tail voltages of the LED strings to identify the minimum tail voltage and adjusts the output voltage based on the lowest tail voltage. The LED strings grouped into subsets and the feedback controller is segmented such that, for a certain duration, a minimum tail voltage is determined for each subset. The minimum tail voltages of the subsets are used to determine the overall minimum tail voltage of the plurality of LED strings for the certain duration so as to control the output voltage in the following duration. The segments of the feedback controller can be implemented in separate integrated circuit (IC) packages, thereby facilitating adaptation to different numbers of LED strings by integrating the corresponding number of IC packages.

Led Driver With Frame-Based Dynamic Power Management

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US Patent:
8279144, Oct 2, 2012
Filed:
Jul 31, 2008
Appl. No.:
12/183492
Inventors:
Bin Zhao - Irvine CA, US
Jack W. Cornish - Foothill Ranch CA, US
Brian B. Horng - Irvine CA, US
Andrew M Kameya - Irvine CA, US
Jan Krellner - Chandler AZ, US
Kenneth C. Kwok - Irvine CA, US
Victor K. Lee - Irvine CA, US
Weizhuang W. Xin - Aliso Viejo CA, US
Assignee:
Freescale Semiconductor, Inc. - Austin TX
International Classification:
G09G 3/32
US Classification:
345 82, 315297
Abstract:
Disclosed are example techniques for frame-based power management in a light emitting diode (LED) system having a plurality of LED strings. A voltage source provides an output voltage to drive the LED strings. An LED driver generates a frame timing reference representative of the frame rate or display timing of a series of image frames to be displayed via the LED system. An update reference is generated from the frame timing reference. The LED driver monitors one or more operating parameters of the LED system. In response to update triggers marked by the update reference, the LED driver adjusts the output voltage of the voltage source based on the status of each of the one or more monitored operating parameters (either from the previous update period or determined in response to the update trigger), thereby synchronizing the updating of the output voltage to the frame rate (or a virtual approximation of the frame rate) of the video being displayed.

Filter Tuner System And Method

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US Patent:
20020067220, Jun 6, 2002
Filed:
Oct 5, 2001
Appl. No.:
09/971484
Inventors:
Brian Horng - Irvine CA, US
Benedict Itri - Newport Beach CA, US
Devin Ng - Mission Viejo CA, US
John Ross - Aberdeen NJ, US
James Zhao - Tustin CA, US
International Classification:
H04B003/04
US Classification:
333/017100
Abstract:
A system and method for a filter tuner is presented. The system comprises a sequential logic, a register, a comparator, a first and second counter, a synchronizing logic, a first and second oscillator, a control logic, and a first and second combinational logic. The method comprises the steps of executing a calibration cycle of a filter tuner, executing a measurement cycle of the filter tuner, and tuning a filter with the filter tuner dependent on a determined cutoff frequency variation.
Brian Borrong Horng from Irvine, CA, age ~67 Get Report