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Bradley J Litterell

from Bellevue, WA
Age ~58

Bradley Litterell Phones & Addresses

  • 3448 162Nd Pl SE, Bellevue, WA 98008 (425) 647-3295 (425) 746-1234
  • Redmond, WA
  • 430 Elkhorn Ln, Escondido, CA 92026 (760) 738-7145
  • 1564 Tanglewood Ln, Escondido, CA 92029
  • La Mesa, CA
  • El Cajon, CA
  • San Diego, CA

Business Records

Name / Title
Company / Classification
Phones & Addresses
Bradley Litterell
Principal
Np Discoveries
Business Services at Non-Commercial Site · Nonclassifiable Establishments
3448 162 Pl SE, Bellevue, WA 98008

Publications

Us Patents

Declarative Style Rules For Default Touch Behaviors

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US Patent:
20140019844, Jan 16, 2014
Filed:
Jul 13, 2012
Appl. No.:
13/548913
Inventors:
Matthew A. Rakow - Seattle WA, US
Tony E. Schreiner - Redmond WA, US
Bradley J. Litterell - Bellevue WA, US
Kevin M. Babbitt - Sammamish WA, US
Praveen Kumar Muralidhar Rao - Sammamish WA, US
Justin E. Rogers - Redmond WA, US
Sylvain P. Galineau - Seattle WA, US
Arron J. Eicholz - Enumclaw WA, US
Assignee:
Microsoft Corporation - Redmond WA
International Classification:
G06F 17/20
US Classification:
715234
Abstract:
In at least some embodiments, a mechanism is provided for web developers to request specific default behaviors, such as touch behaviors, on their webpages. In at least some implementations, a Cascading Style Sheets (CSS) rule is utilized to enable or disable manipulations such as panning, pinch zoom, and double-tap-zoom manipulations. The mechanism can be extensible to accommodate additional default behaviors that are added in the future. In various embodiments, the behaviors are declared upfront and thus differ from solutions which employ an imperative model. The declarative nature of this approach allows achievement of full independence from the main thread and deciding the correct response using independent hit testing.

Independent Hit Testing

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US Patent:
20140013160, Jan 9, 2014
Filed:
Jul 9, 2012
Appl. No.:
13/544243
Inventors:
Matthew A. Rakow - Seattle WA, US
Tony E. Schreiner - Redmond WA, US
Bradley J. Litterell - Bellevue WA, US
Kevin M. Babbitt - Sammamish WA, US
Praveen Kumar Muralidhar Rao - Sammamish WA, US
Christian Fortini - Sammamish WA, US
Assignee:
MICROSOFT CORPORATION - Redmond WA
International Classification:
G06F 11/28
US Classification:
714 32, 714E11178
Abstract:
In one or more embodiments, a hit test thread which is separate from the main thread, e.g. the user interface thread, is utilized for hit testing on web content. Using a separate thread for hit testing can allow targets to be quickly ascertained. In cases where the appropriate response is handled by a separate thread, such as a manipulation thread that can be used for touch manipulations such as panning and pinch zooming, manipulation can occur without blocking on the main thread. This results in the response time that is consistently quick even on low-end hardware over a variety of scenarios.

Fuse Based Replay Protection With Dynamic Fuse Usage And Countermeasures For Fuse Voltage Cut Attacks

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US Patent:
20220336033, Oct 20, 2022
Filed:
Mar 18, 2022
Appl. No.:
17/655447
Inventors:
- Redmond WA, US
Felix DOMKE - Lübeck, DE
Ankur CHOUDHARY - Redmond WA, US
Bradley Joseph LITTERELL - Bellevue WA, US
Assignee:
Microsoft Technology Licensing, LLC - Redmond WA
International Classification:
G11C 29/02
Abstract:
A TPM with programmable fuses in an SOC includes an on-die RAM storing a blown-fuse count and a TPM state read from off-die NV memory. During initialization, if the blown-fuse count is greater than a TPM state fuse count, a TPM state PIN-attempt-failure count is incremented, thereby thwarting a replay attack. If a PIN satisfies a PIN failure policy, and if a TPM state previously-passed-PIN indicator is set to true, a fuse is blown and the blown-fuse count incremented depending on the PIN being incorrect, but if the TPM state previously-passed-PIN indicator is set to false, a fuse is blown and the blown-fuse count incremented independent of whether the PIN is correct or incorrect. The TPM state fuse count is set equal to the blown-fuse count. If a counter cleared before processing the PIN remains cleared during the next initialization, a fuse voltage cut is detected and a penalty imposed.

Fuse Based Replay Protection With Aggressive Fuse Usage And Countermeasures For Fuse Voltage Cut Attacks

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US Patent:
20220318375, Oct 6, 2022
Filed:
Mar 31, 2021
Appl. No.:
17/219459
Inventors:
- Redmond WA, US
Felix DOMKE - Lübeck, DE
Ankur CHOUDHARY - Redmond WA, US
Bradley Joseph LITTERELL - Bellevue WA, US
International Classification:
G06F 21/55
G06F 21/76
Abstract:
A TPM with programmable fuses in an SOC includes an on-die RAM storing a blown-fuse count and a TPM state including a PIN-attempt-failure count and a fuse count, read from off-die NV memory. During initialization, if the blown-fuse count is greater than TPM state fuse count, TPM state PIN-attempt-failure count is incremented, thereby thwarting a replay attack. A PIN is received for access, and if the TPM state PIN-attempt-failure count satisfies a policy, a fuse is blown and the blown-fuse count incremented. If the fuse blow fails, TPM activity is halted. If the fuse blow succeeds and the PIN is correct, the TPM state PIN-attempt-failure count is cleared, but if the PIN is incorrect the TPM state PIN-attempt-failure count is incremented. TPM state fuse count is set equal to the blown-fuse count, and the TPM state is saved to off-die NV memory.

Fuse Based Replay Protection With Conservative Fuse Usage

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US Patent:
20220318405, Oct 6, 2022
Filed:
Mar 31, 2021
Appl. No.:
17/219392
Inventors:
- Redmond WA, US
Felix DOMKE - Lubeck, DE
Ankur CHOUDHARY - Redmond WA, US
Bradley Joseph LITTERELL - Bellevue WA, US
International Classification:
G06F 21/60
G06F 21/53
Abstract:
A TPM is implemented in an SOC for thwarting PIN state replay attacks. Programmable fuses are used as a counter and an on-die RAM stores a blown-fuse count and a TPM state that includes a PIN-failure count and a fuse count. TPM initialization includes incrementing the TPM state PIN-failure count if the blown-fuse count is greater than the TPM state fuse count. Once a PIN is received, if the TPM state PIN-failure count satisfies a PIN failure policy and the PIN is correct, the TPM state PIN-failure count is cleared, and if the PIN is incorrect, a fuse is blown and the blown-fuse count is incremented. If the fuse blow fails, TPM activity is halted. If the fuse blow succeeds, the TPM state PIN-failure count is incremented and the TPM state fuse count is set equal to the blown-fuse count. The TPM state is saved to off-die non-volatile memory.

Declarative Style Rules For Default Touch Behaviors

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US Patent:
20150261730, Sep 17, 2015
Filed:
Apr 7, 2015
Appl. No.:
14/680807
Inventors:
- Redmond WA, US
Tony E. Schreiner - Bellevue WA, US
Bradley J. Litterell - Bellevue WA, US
Kevin M. Babbitt - Sammamish WA, US
Praveen Kumar Muralidhar Rao - Sammamish WA, US
Justin E. Rogers - Redmond WA, US
Sylvain P. Galineau - Seattle WA, US
Arron J. Eicholz - Enumclaw WA, US
International Classification:
G06F 17/22
G06F 3/0484
G06F 3/0488
Abstract:
In at least some embodiments, a mechanism is provided for web developers to request specific default behaviors, such as touch behaviors, on their webpages. In at least some implementations, a Cascading Style Sheets (CSS) rule is utilized to enable or disable manipulations such as panning, pinch zoom, and double-tap-zoom manipulations. The mechanism can be extensible to accommodate additional default behaviors that are added in the future. In various embodiments, the behaviors are declared upfront and thus differ from solutions which employ an imperative model. The declarative nature of this approach allows achievement of full independence from the main thread and deciding the correct response using independent hit testing.

Independent Hit Testing

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US Patent:
20150026689, Jan 22, 2015
Filed:
Oct 2, 2014
Appl. No.:
14/505023
Inventors:
- Redmond WA, US
Tony E. Schreiner - Bellevue WA, US
Bradley J. Litterell - Bellevue WA, US
Kevin M. Babbitt - Sammamish WA, US
Praveen Kumar Muralidhar Rao - Sammamish WA, US
Christian Fortini - Sammamish WA, US
International Classification:
G06F 9/46
G06F 3/0484
G06F 3/033
G06F 3/0485
US Classification:
718102
Abstract:
In one or more embodiments, a hit test thread which is separate from the main thread, e.g. the user interface thread, is utilized for hit testing on web content. Using a separate thread for hit testing can allow targets to be quickly ascertained. In cases where the appropriate response is handled by a separate thread, such as a manipulation thread that can be used for touch manipulations such as panning and pinch zooming, manipulation can occur without blocking on the main thread. This results in the response time that is consistently quick even on low-end hardware over a variety of scenarios.
Bradley J Litterell from Bellevue, WA, age ~58 Get Report