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Avi M Avanindra

from Santa Clara, CA
Age ~51

Avi Avanindra Phones & Addresses

  • 2278 Bray Ave, Santa Clara, CA 95050 (408) 249-4119
  • 6386 Blossom Valley Ln, Salt Lake City, UT 84118
  • West Valley City, UT
  • Acworth, GA
  • Ames, IA
  • San Jose, CA
  • Cobb, GA
  • 2278 Bray Ave, Santa Clara, CA 95050

Work

Company: Cypress semiconductor corporation 2011 Position: Manager, applications and systems engineering

Education

School / High School: Kendriya Vidyalaya

Skills

Asic • Soc • Semiconductors • Functional Verification

Emails

d***a@hotmail.com

Industries

Semiconductors

Public records

Vehicle Records

Avi Avanindra

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Address:
2278 Bray Ave, Santa Clara, CA 95050
VIN:
JTDKN3DU1A1074838
Make:
TOYOTA
Model:
PRIUS
Year:
2010

Resumes

Resumes

Avi Avanindra Photo 1

Manager, Applications And Systems Engineering

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Location:
Santa Clara, CA
Industry:
Semiconductors
Work:
Cypress Semiconductor Corporation
Manager, Applications and Systems Engineering

Cisco 2005 - 2011
Technical Leader

Ikanos Communications 2000 - 2005
Senior Member Technical Staff

Intel Corporation 1997 - 2000
Design Engineer
Education:
Kendriya Vidyalaya
Indian Institute of Technology, Bombay
Bachelors, Bachelor of Technology, Electronics, Engineering, Communications
Iowa State University
Master of Science, Masters
Stanford University
Skills:
Asic
Soc
Semiconductors
Functional Verification

Publications

Us Patents

Multi-Channel Physical Interfaces And Methods For Static Random Access Memory Devices

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US Patent:
20150117092, Apr 30, 2015
Filed:
Mar 28, 2014
Appl. No.:
14/229765
Inventors:
- San Jose CA, US
Derwin W. Mattos - San Mateo CA, US
Avi Avanindra - San Jose CA, US
International Classification:
G11C 11/413
US Classification:
365154
Abstract:
An integrated circuit (IC) device can include a static random access memory (SRAM) section comprising a plurality of memory banks; and an interface comprising physical connections for more than eight memory channels, the connections for each memory channel including an address section including connections for SRAM control inputs and a complete address to access the memory banks, and a data section including data inputs and outputs (data IOs) to transfer data for one memory bank.
Avi M Avanindra from Santa Clara, CA, age ~51 Get Report