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Augusto Vega Phones & Addresses

  • Union City, NJ
  • 248 Euclid Ave, Ridgefield Park, NJ 07660 (201) 440-2141
  • Hackensack, NJ
  • North Bergen, NJ
  • Jersey City, NJ
  • 248 Euclid Ave #1, Ridgefield Park, NJ 07660

Publications

Us Patents

Local Computation Logic Embedded In A Register File To Accelerate Programs

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US Patent:
20130046955, Feb 21, 2013
Filed:
Aug 17, 2011
Appl. No.:
13/211701
Inventors:
Pradip Bose - Yorktown Heights NY, US
Alper Buyuktosunoglu - Yorktown Heights NY, US
Jeffrey Haskell Derby - Research Triangle Park NC, US
Michele Martino Franceschini - Yorktown Heights NY, US
Robert Kevin Montoye - Yorktown Heights NY, US
Augusto J. Vega - Yorktown Heights NY, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY
International Classification:
G06F 15/76
US Classification:
712 15, 712E09062
Abstract:
A system and methods for improving performance of an central processing unit. The central processing unit system includes: a pipeline configured to receive an instruction; and a register file partitioned into a one or more subarrays where (i) the register file includes one or more computation elements and (ii) the one or more computation elements are directly connected to one or more subarrays.

Input-Encoding With Federated Learning

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US Patent:
20220343218, Oct 27, 2022
Filed:
Apr 26, 2021
Appl. No.:
17/239812
Inventors:
- Armonk NY, US
Brian E. D. Kingsbury - Cortlandt Manor NY, US
Kush Raj Varshney - Ossining NY, US
Pradip Bose - YORKTOWN HEIGHTS NY, US
Dinesh C. Verma - New Castle NY, US
Shiqiang Wang - White Plains NY, US
Augusto Vega - Mount Vernon NY, US
ASHISH VERMA - Nanuet NY, US
SUPRIYO CHAKRABORTY - White Plains NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06N 20/20
G06F 11/34
Abstract:
Embodiments relate to an input-encoding technique in conjunction with federation. Participating entities are arranged in a collaborative relationship. Each participating entity trains a machine learning model with an encoder on a training data set. The performance of each of the models is measured and at least one of the models is selectively identified based on the measured performance. An encoder of the selectively identified machine learning model is shared with each of the participating entities. The shared encoder is configured to be applied by the participating entities to train the first and second machine learning models, which are configured to be merged and shared in the federated learning environment.

Sensor-Based Non-Uniform Cooling

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US Patent:
20220179465, Jun 9, 2022
Filed:
Jan 3, 2020
Appl. No.:
16/733362
Inventors:
- Armonk NY, US
Alper Buyuktosunoglu - White Plains NY, US
Timothy Joseph Chainer - Putnam Valley NY, US
Pritish Ranjan Parida - Fishkill NY, US
Augusto Javier Vega - Astoria NY, US
International Classification:
G06F 1/20
G05D 23/19
Abstract:
Techniques for inducing non-uniform cooling are described. According to an embodiment, a system is provided. The system can comprise at least one processor device that executes components stored in a memory, wherein the components comprise: a flow control device that distributes coolant to a location of the at least one processor device; and a sensor controller component that detects a location of a thermal anomaly of the at least one processor device. The components can also comprise a cooling controller component that adjusts the flow control device to direct the coolant to the location of the thermal anomaly.

Learning Agent Based Application Scheduling

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US Patent:
20230012710, Jan 19, 2023
Filed:
Jul 14, 2021
Appl. No.:
17/305784
Inventors:
- Armonk NY, US
Augusto VEGA - Yorktown Heights NY, US
Alper BUYUKTOSUNOGLU - Yorktown Heights NY, US
Hubertus FRANKE - Yorktown Heights NY, US
John-David WELLMAN - Yorktown Heights NY, US
Pradip BOSE - Yorktown Heights NY, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY
International Classification:
G06F 9/48
G06F 9/445
G06N 20/00
Abstract:
Tasks of directed acyclic graphs (DAGs) may be dynamically scheduled based on a plurality of constraints and conditions, task prioritization policies, task execution estimates, and configurations of a heterogenous system. A machine learning component may be initialized to dynamically schedule the tasks of the DAGs.

Computing With Unreliable Processor Cores

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US Patent:
20200319981, Oct 8, 2020
Filed:
Apr 5, 2019
Appl. No.:
16/377131
Inventors:
- Armonk NY, US
Augusto Vega - Mount Vernon NY, US
Alper Buyuktosunoglu - White Plains NY, US
Pradip Bose - Yorktown Heights NY, US
International Classification:
G06F 11/16
G06F 11/00
G06F 11/18
G06F 11/30
Abstract:
A computer system that has two or more processing engines (PE), each capable of performing one or more operations on one or more operands but one or more of the PEs performs the operations unreliably. Initial results of each operation are debiased to create a debiased result used by the system instead of the initial result. The debiased result has an expected value equal to a correct output where the correct output is the initial result the respective operation would have produced if the respective operation performed was reliable.

Inducing Heterogeneous Microprocessor Behavior Using Non-Uniform Cooling

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US Patent:
20190204884, Jul 4, 2019
Filed:
Mar 6, 2019
Appl. No.:
16/294095
Inventors:
- Armonk NY, US
Alper Buyuktosunoglu - White Plains NY, US
Timothy Joseph Chainer - Putnam Valley NY, US
Pritish Ranjan Parida - Fishkill NY, US
Augusto Javier Vega - Astoria NY, US
International Classification:
G06F 1/20
G06F 1/324
G06F 1/3206
Abstract:
Techniques for inducing heterogeneous microprocessor behavior using non-uniform cooling are described. According to an embodiment, a device is provided that comprises an IC chip comprising a plurality of cores and a cooling apparatus coupled to the integrated chip that cools the integrated chip in association with electrical operation of the plurality of cores. The cooling apparatus cools a first core of the plurality of cores to a lower temperature than a second core of the plurality of cores. In various embodiments, the cooling apparatus comprises a plurality of channels embedded within the integrated chip and the cooling apparatus cools the integrated chip via flow of liquid coolant through the plurality of channels.

Parameter Criticality-Aware Resilience

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US Patent:
20180307968, Oct 25, 2018
Filed:
Apr 21, 2017
Appl. No.:
15/493263
Inventors:
- Armonk NY, US
ALPER BUYUKTOSUNOGLU - WHITE PLAINS NY, US
AUGUSTO J. VEGA - MOUNT VERNON NY, US
International Classification:
G06N 3/04
G06N 3/08
Abstract:
A computer-implemented method optimizes a neural network. One or more processors define layers in a neural network based on neuron locations relative to incoming initial inputs and original outgoing final outputs of the neural network, where a first defined layer is closer to the incoming initial inputs than a second defined layer, and where the second defined layer is closer to the original outgoing final outputs than the first defined layer. The processor(s) define parameter criticalities for parameter weights stored in a memory used by the neural network, and associate defined layers in the neural network with different memory banks based on the parameter criticalities for the parameter weights. The processor(s) store parameter weights used by neurons in the first defined layer in the first memory bank and parameter weights used by neurons in the second defined layer in the second memory bank.

Model Training By Discarding Relatively Less Relevant Parameters

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US Patent:
20180268290, Sep 20, 2018
Filed:
Mar 17, 2017
Appl. No.:
15/461643
Inventors:
- Armonk NY, US
Alper Buyuktosunoglu - White Plains NY, US
Augusto J. Vega - Mount Vernon NY, US
International Classification:
G06N 3/08
Abstract:
Embodiments of the present invention include a system, computer-implemented method, and a computer program product. A non-limiting example of the method includes a processor utilizing a model having a plurality of parameters. The processor compares a current value of a model parameter to a prior value of the model parameter. Based at least in part on comparing the current value of the model parameter to the prior value of the model parameter, a determination is made that the model being utilized by the processor has changed. The current value of the model parameter is transmitted by the processor.
Augusto A Vega from Union City, NJ, age ~76 Get Report